commit c6daff05d40ea03e4dc385901ed128d90190216f
author Jay Buddhabhatti <jay.buddhabhatti@xilinx.com> Mon Sep 05 02:56:32 2022 -0700
committer Michal Simek <michal.simek@amd.com> Tue Sep 20 19:02:42 2022 +0200
tree 0f3f48308280bfdb5581d778e0fe5f81e181c8d9
parent aa5443e15edcabc5cfdbf9c6f4dd182c7339e067

feat(versal-net): add support for platform management

Add support for PM EEMI interface for Versal_net. Also use PM
APIs in psci ops. Added TFA_NO_PM flag to disable PM functionality.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: If2b2941c868bc9b0850d7f3adb81eac0e660c149

plat/xilinx/versal_net/include/plat_private.h

diff --git a/plat/xilinx/versal_net/include/plat_private.h b/plat/xilinx/versal_net/include/plat_private.h
index 6bd01ba..6a3bc19 100644
--- a/plat/xilinx/versal_net/include/plat_private.h
+++ b/plat/xilinx/versal_net/include/plat_private.h
@@ -9,8 +9,14 @@
 #ifndef PLAT_PRIVATE_H
 #define PLAT_PRIVATE_H
 
+#include <bl31/interrupt_mgmt.h>
 #include <lib/xlat_tables/xlat_tables_v2.h>
 
+typedef struct versal_intr_info_type_el3 {
+	uint32_t id;
+	interrupt_type_handler_t handler;
+} versal_intr_info_type_el3_t;
+
 void versal_net_config_setup(void);
 
 const mmap_region_t *plat_versal_net_get_mmap(void);
@@ -18,7 +24,12 @@
 void plat_versal_net_gic_driver_init(void);
 void plat_versal_net_gic_init(void);
 void plat_versal_net_gic_cpuif_enable(void);
+void plat_versal_net_gic_cpuif_disable(void);
 void plat_versal_net_gic_pcpu_init(void);
+void plat_versal_net_gic_save(void);
+void plat_versal_net_gic_resume(void);
+void plat_versal_net_gic_redistif_on(void);
+void plat_versal_net_gic_redistif_off(void);
 
 extern uint32_t cpu_clock, platform_id, platform_version;
 void board_detection(void);
@@ -26,6 +37,11 @@
 uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
 		       uint64_t x4, void *cookie, void *handle, uint64_t flags);
 int32_t sip_svc_setup_init(void);
+/*
+ * Register handler to specific GIC entrance
+ * for INTR_TYPE_EL3 type of interrupt
+ */
+int request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler);
 
 #define PM_GET_CHIPID			(24U)
 #define IOCTL_OSPI_MUX_SELECT		(21U)