chore(versal2): realign address printing
Secure code address to be printed only when TF-A is
compiled with supported dispatcher service.
Change-Id: Ifb31f07981c00a9fddc7470aa991773266840400
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
diff --git a/plat/amd/versal2/bl31_setup.c b/plat/amd/versal2/bl31_setup.c
index 3a856cb..6da477b 100644
--- a/plat/amd/versal2/bl31_setup.c
+++ b/plat/amd/versal2/bl31_setup.c
@@ -178,7 +178,9 @@
INFO("CPU Revision = 0x%lx\n", rev_var);
INFO("cpu_clock = %dHz, uart_clock = %dHz\n", cpu_clock, uart_clock);
NOTICE("BL31: Executing from 0x%x\n", BL31_BASE);
+#if (defined(SPD_tspd) || defined(SPD_opteed))
NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc);
+#endif /* SPD_tspd || SPD_opteed */
NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc);
}