Tegra194: memctrl: set CGID_TAG_ADR instead of CGID_TAG_DEFAULT
- All SoC clients should use CGID_TAG_ADR to improve perf
- Remove tegra194_txn_override_cfgs array that is not getting used.
Change-Id: I9130ef5ae8659ed5f9d843ab9a0ecf58b5ce9c74
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
diff --git a/plat/nvidia/tegra/soc/t194/plat_memctrl.c b/plat/nvidia/tegra/soc/t194/plat_memctrl.c
index d9ea50e..7a9e240 100644
--- a/plat/nvidia/tegra/soc/t194/plat_memctrl.c
+++ b/plat/nvidia/tegra/soc/t194/plat_memctrl.c
@@ -269,38 +269,6 @@
mc_make_sec_cfg(MIU3W, NON_SECURE, OVERRIDE, ENABLE),
};
-/*******************************************************************************
- * Array to hold the transaction override configs
- ******************************************************************************/
-const static mc_txn_override_cfg_t tegra194_txn_override_cfgs[] = {
- mc_make_txn_override_cfg(NVENCSWR, CGID_TAG_ADR),
- mc_make_txn_override_cfg(HDAW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(SATAW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(ISPWB, CGID_TAG_ADR),
- mc_make_txn_override_cfg(XUSB_HOSTW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(XUSB_DEVW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(TSECSWR, CGID_TAG_ADR),
- mc_make_txn_override_cfg(SDMMCWA, CGID_TAG_ADR),
- mc_make_txn_override_cfg(SDMMCW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(SDMMCWAB, CGID_TAG_ADR),
- mc_make_txn_override_cfg(VICSWR, CGID_TAG_ADR),
- mc_make_txn_override_cfg(NVDECSWR, CGID_TAG_ADR),
- mc_make_txn_override_cfg(APEW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(NVJPGSWR, CGID_TAG_ADR),
- mc_make_txn_override_cfg(SESWR, CGID_TAG_ADR),
- mc_make_txn_override_cfg(ETRW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(TSECSWRB, CGID_TAG_ADR),
- mc_make_txn_override_cfg(AXISW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(EQOSW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(UFSHCW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(BPMPW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(BPMPDMAW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(AONW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(AONDMAW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(SCEW, CGID_TAG_ADR),
- mc_make_txn_override_cfg(SCEDMAW, CGID_TAG_ADR),
-};
-
/* To be called by common memctrl_v2.c */
static void tegra194_memctrl_reconfig_mss_clients(void)
{
@@ -445,135 +413,131 @@
* - MMIO's can be early acked and AXI ensures dev memory ordering,
* Client ensures read/write direction change ordering.
* - See Bug 200312466 for more details.
- *
- * CGID_TAG_ADR is only present from T186 A02. As this code is common
- * between A01 and A02, tegra_memctrl_set_overrides() programs
- * CGID_TAG_ADR for the necessary clients on A02.
*/
- mc_set_txn_override(AONDMAR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(AONDMAW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(AONR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(AONW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(APEDMAR, CGID_TAG_CLIENT_AXI_ID, SO_DEV_CLIENT_AXI_ID, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(APEDMAW, CGID_TAG_CLIENT_AXI_ID, SO_DEV_CLIENT_AXI_ID, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(APER, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(APEW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(AXISR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(AXISW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(BPMPDMAR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(BPMPDMAW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(BPMPR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(BPMPW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(EQOSR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(EQOSW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(ETRR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(ETRW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(HOST1XDMAR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVDISPLAYR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(NVDISPLAYR1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(PCIE0R, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE0R1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE0W, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE1R, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE1W, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(AONDMAR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(AONDMAW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(AONR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(AONW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(APEDMAR, CGID_TAG_ADR, SO_DEV_CLIENT_AXI_ID, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(APEDMAW, CGID_TAG_ADR, SO_DEV_CLIENT_AXI_ID, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(APER, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(APEW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(AXISR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(AXISW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(BPMPDMAR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(BPMPDMAW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(BPMPR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(BPMPW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(EQOSR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(EQOSW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(ETRR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(ETRW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(HOST1XDMAR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVDISPLAYR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(NVDISPLAYR1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(PCIE0R, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE0R1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE0W, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE1R, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE1W, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
if (tegra_platform_is_silicon()) {
- mc_set_txn_override(PCIE2AR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE2AW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE3R, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE3W, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE4R, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE4W, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE5R, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE5W, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(PCIE5R1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE2AR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE2AW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE3R, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE3W, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE4R, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE4W, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE5R, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE5W, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(PCIE5R1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
}
- mc_set_txn_override(RCEDMAR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(RCEDMAW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(RCER, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(RCEW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SATAR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(SATAW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(SCEDMAR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SCEDMAW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SCER, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SCEW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SDMMCR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SDMMCRAB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SDMMCRA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SDMMCW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SDMMCWA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(SDMMCWAB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(RCEDMAR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(RCEDMAW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(RCER, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(RCEW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SATAR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(SATAW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(SCEDMAR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SCEDMAW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SCER, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SCEW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SDMMCR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SDMMCRAB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SDMMCRA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SDMMCW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SDMMCWA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(SDMMCWAB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
/*
* TO DO: make SESRD/WR FORCE_COHERENT once SE+TZ with SMMU is enabled.
*/
- mc_set_txn_override(SESRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(SESWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(TSECSRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(TSECSRDB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(TSECSWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(TSECSWRB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(UFSHCR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(UFSHCW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(VICSRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(VICSRD1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(VICSWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(VIFALR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(VIFALW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(XUSB_DEVR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(XUSB_DEVW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(XUSB_HOSTR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(XUSB_HOSTW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
- mc_set_txn_override(AXIAPR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(AXIAPW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA0FALRDB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA0FALWRB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA0RDA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA0RDA1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA0WRA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA1FALRDB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA1FALWRB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA1RDA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA1RDA1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(DLA1WRA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(HDAR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(HDAW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
- mc_set_txn_override(ISPFALR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(ISPFALW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(ISPRA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(ISPRA1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(ISPWA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(ISPWB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVDEC1SRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVDEC1SRD1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVDEC1SWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVDECSRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVDECSRD1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVDECSWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVENC1SRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVENC1SRD1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVENC1SWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVENCSRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVENCSRD1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVENCSWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVJPGSRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(NVJPGSWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA0RDA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA0RDA1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA0RDB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA0RDB1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA0RDC, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA0WRA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA0WRB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA0WRC, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA1RDA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA1RDA1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA1RDB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA1RDB1, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA1RDC, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA1WRA, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA1WRB, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(PVA1WRC, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
- mc_set_txn_override(VIW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(SESRD, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(SESWR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(TSECSRD, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(TSECSRDB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(TSECSWR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(TSECSWRB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(UFSHCR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(UFSHCW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(VICSRD, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(VICSRD1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(VICSWR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(VIFALR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(VIFALW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(XUSB_DEVR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(XUSB_DEVW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(XUSB_HOSTR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(XUSB_HOSTW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, FORCE_COHERENT_SNOOP);
+ mc_set_txn_override(AXIAPR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(AXIAPW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA0FALRDB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA0FALWRB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA0RDA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA0RDA1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA0WRA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA1FALRDB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA1FALWRB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA1RDA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA1RDA1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(DLA1WRA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(HDAR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(HDAW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
+ mc_set_txn_override(ISPFALR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(ISPFALW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(ISPRA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(ISPRA1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(ISPWA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(ISPWB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVDEC1SRD, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVDEC1SRD1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVDEC1SWR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVDECSRD, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVDECSRD1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVDECSWR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVENC1SRD, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVENC1SRD1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVENC1SWR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVENCSRD, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVENCSRD1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVENCSWR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVJPGSRD, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(NVJPGSWR, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA0RDA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA0RDA1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA0RDB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA0RDB1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA0RDC, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA0WRA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA0WRB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA0WRC, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA1RDA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA1RDA1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA1RDB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA1RDB1, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA1RDC, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA1WRA, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA1WRB, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(PVA1WRC, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_COHERENT, FORCE_COHERENT);
+ mc_set_txn_override(VIW, CGID_TAG_ADR, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
/*
* At this point, ordering can occur at SCF. So, remove PCFIFO's
@@ -686,8 +650,6 @@
.num_streamid_override_cfgs = (uint32_t)ARRAY_SIZE(tegra194_streamid_override_regs),
.streamid_security_cfg = tegra194_streamid_sec_cfgs,
.num_streamid_security_cfgs = (uint32_t)ARRAY_SIZE(tegra194_streamid_sec_cfgs),
- .txn_override_cfg = tegra194_txn_override_cfgs,
- .num_txn_override_cfgs = (uint32_t)ARRAY_SIZE(tegra194_txn_override_cfgs),
.reconfig_mss_clients = tegra194_memctrl_reconfig_mss_clients
};