tree dcc9ef3e3d00f8591c1f89a173bac2070ab8fba4
parent 56547879196b073d02894cecfc359b596b23e47e
author Siva Durga Prasad Paladugu <sivadur@xilinx.com> 1517989381 +0530
committer Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> 1526550550 +0530

plat: xilinx: zynqmp: Make fpga load blocking until completed

This patch makes bitstream load blocking call and waits until
bitstream is loaded successfully or return with error.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Avesh Khan <aveshk@xilinx.com>