Merge "build(fvp): make all builds unconditional" into integration
diff --git a/plat/mediatek/drivers/apusys/apusys_rv/2.0/apusys_rv.c b/plat/mediatek/drivers/apusys/apusys_rv/2.0/apusys_rv.c
index 86c4b81..cb57668 100644
--- a/plat/mediatek/drivers/apusys/apusys_rv/2.0/apusys_rv.c
+++ b/plat/mediatek/drivers/apusys/apusys_rv/2.0/apusys_rv.c
@@ -37,18 +37,8 @@
int apusys_kernel_apusys_rv_setup_reviser(void)
{
- static bool apusys_rv_setup_reviser_called;
-
spin_lock(&apusys_rv_lock);
- if (apusys_rv_setup_reviser_called) {
- WARN(MODULE_TAG "%s: already initialized\n", __func__);
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
- apusys_rv_setup_reviser_called = true;
-
mmio_write_32(USERFW_CTXT, CFG_4GB_SEL_EN | CFG_4GB_SEL);
mmio_write_32(SECUREFW_CTXT, CFG_4GB_SEL_EN | CFG_4GB_SEL);
@@ -74,18 +64,8 @@
int apusys_kernel_apusys_rv_reset_mp(void)
{
- static bool apusys_rv_reset_mp_called;
-
spin_lock(&apusys_rv_lock);
- if (apusys_rv_reset_mp_called) {
- WARN(MODULE_TAG "%s: already initialized\n", __func__);
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
- apusys_rv_reset_mp_called = true;
-
mmio_write_32(MD32_SYS_CTRL, MD32_SYS_CTRL_RST);
dsb();
@@ -106,18 +86,8 @@
int apusys_kernel_apusys_rv_setup_boot(void)
{
- static bool apusys_rv_setup_boot_called;
-
spin_lock(&apusys_rv_lock);
- if (apusys_rv_setup_boot_called) {
- WARN(MODULE_TAG "%s: already initialized\n", __func__);
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
- apusys_rv_setup_boot_called = true;
-
mmio_write_32(MD32_BOOT_CTRL, APU_SEC_FW_IOVA);
mmio_write_32(MD32_PRE_DEFINE, (PREDEFINE_CACHE_TCM << PREDEF_1G_OFS) |
@@ -130,55 +100,17 @@
int apusys_kernel_apusys_rv_start_mp(void)
{
- static bool apusys_rv_start_mp_called;
-
spin_lock(&apusys_rv_lock);
-
- if (apusys_rv_start_mp_called) {
- WARN(MODULE_TAG "%s: already initialized\n", __func__);
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
- apusys_rv_start_mp_called = true;
-
mmio_write_32(MD32_RUNSTALL, MD32_RUN);
-
spin_unlock(&apusys_rv_lock);
return 0;
}
-static bool watch_dog_is_timeout(void)
-{
- if (mmio_read_32(WDT_INT) != WDT_INT_W1C) {
- ERROR(MODULE_TAG "%s: WDT does not timeout\n", __func__);
- return false;
- }
- return true;
-}
-
int apusys_kernel_apusys_rv_stop_mp(void)
{
- static bool apusys_rv_stop_mp_called;
-
spin_lock(&apusys_rv_lock);
-
- if (apusys_rv_stop_mp_called) {
- WARN(MODULE_TAG "%s: already initialized\n", __func__);
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
- if (watch_dog_is_timeout() == false) {
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
- apusys_rv_stop_mp_called = true;
-
mmio_write_32(MD32_RUNSTALL, MD32_STALL);
-
spin_unlock(&apusys_rv_lock);
return 0;
@@ -186,19 +118,10 @@
int apusys_kernel_apusys_rv_setup_sec_mem(void)
{
- static bool apusys_rv_setup_sec_mem_called;
int ret;
spin_lock(&apusys_rv_lock);
- if (apusys_rv_setup_sec_mem_called) {
- WARN(MODULE_TAG "%s: already initialized\n", __func__);
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
- apusys_rv_setup_sec_mem_called = true;
-
ret = set_apu_emi_mpu_region();
if (ret != 0) {
ERROR(MODULE_TAG "%s: set emimpu protection failed\n", __func__);
@@ -230,12 +153,6 @@
int apusys_kernel_apusys_rv_cg_gating(void)
{
spin_lock(&apusys_rv_lock);
-
- if (watch_dog_is_timeout() == false) {
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
mmio_write_32(MD32_CLK_CTRL, MD32_CLK_DIS);
spin_unlock(&apusys_rv_lock);
@@ -245,12 +162,6 @@
int apusys_kernel_apusys_rv_cg_ungating(void)
{
spin_lock(&apusys_rv_lock);
-
- if (watch_dog_is_timeout() == false) {
- spin_unlock(&apusys_rv_lock);
- return -1;
- }
-
mmio_write_32(MD32_CLK_CTRL, MD32_CLK_EN);
spin_unlock(&apusys_rv_lock);
diff --git a/plat/mediatek/drivers/apusys/mt8188/apusys_devapc.c b/plat/mediatek/drivers/apusys/mt8188/apusys_devapc.c
index da5242a..f4ff763 100644
--- a/plat/mediatek/drivers/apusys/mt8188/apusys_devapc.c
+++ b/plat/mediatek/drivers/apusys/mt8188/apusys_devapc.c
@@ -271,15 +271,8 @@
int apusys_devapc_rcx_init(void)
{
- static bool apusys_devapc_rcx_init_called;
enum apusys_apc_err_status ret;
- if (apusys_devapc_rcx_init_called == true) {
- INFO(MODULE_TAG "%s: init more than once!\n", __func__);
- return -1;
- }
- apusys_devapc_rcx_init_called = true;
-
apusys_devapc_init("APUAPC_CTRL_RCX", APU_CTRL_DAPC_RCX_BASE);
apusys_devapc_init("APUAPC_NOC_RCX", APU_NOC_DAPC_RCX_BASE);
diff --git a/plat/xilinx/common/include/pm_client.h b/plat/xilinx/common/include/pm_client.h
index a87923f..e9c36c3 100644
--- a/plat/xilinx/common/include/pm_client.h
+++ b/plat/xilinx/common/include/pm_client.h
@@ -1,7 +1,7 @@
/*
* Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2022, Xilinx, Inc. All rights reserved.
- * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -31,7 +31,6 @@
#if defined(PLAT_zynqmp)
enum pm_ret_status pm_set_suspend_mode(uint32_t mode);
-const struct pm_proc *pm_get_proc_by_node(enum pm_node_id nid);
#endif /* PLAT_zynqmp */
#endif /* PM_CLIENT_H */
diff --git a/plat/xilinx/versal/plat_psci.c b/plat/xilinx/versal/plat_psci.c
index 45b1f1c..48d9f5f 100644
--- a/plat/xilinx/versal/plat_psci.c
+++ b/plat/xilinx/versal/plat_psci.c
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
- * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -36,6 +36,9 @@
}
proc = pm_get_proc((uint32_t)cpu_id);
+ if (!proc) {
+ return PSCI_E_INTERN_FAIL;
+ }
/* Send request to PMC to wake up selected ACPU core */
(void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U,
@@ -59,6 +62,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
@@ -96,6 +103,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
@@ -190,6 +201,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
diff --git a/plat/xilinx/versal_net/plat_psci_pm.c b/plat/xilinx/versal_net/plat_psci_pm.c
index 94cb7f5..7260403 100644
--- a/plat/xilinx/versal_net/plat_psci_pm.c
+++ b/plat/xilinx/versal_net/plat_psci_pm.c
@@ -63,6 +63,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
@@ -143,6 +147,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
@@ -186,6 +194,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
diff --git a/plat/xilinx/zynqmp/plat_psci.c b/plat/xilinx/zynqmp/plat_psci.c
index c6c6c4b..9fd00db 100644
--- a/plat/xilinx/zynqmp/plat_psci.c
+++ b/plat/xilinx/zynqmp/plat_psci.c
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
- * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -42,7 +42,11 @@
if (cpu_id == -1) {
return PSCI_E_INTERN_FAIL;
}
+
proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return PSCI_E_INTERN_FAIL;
+ }
/* Check the APU proc status before wakeup */
ret = pm_get_node_status(proc->node_id, buff);
@@ -64,6 +68,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
@@ -89,6 +97,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
@@ -121,6 +133,10 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
+ if (!proc) {
+ return;
+ }
+
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
__func__, i, target_state->pwr_domain_state[i]);
diff --git a/plat/xilinx/zynqmp/pm_service/pm_client.c b/plat/xilinx/zynqmp/pm_service/pm_client.c
index 4afa01d..9d0e2c4 100644
--- a/plat/xilinx/zynqmp/pm_service/pm_client.c
+++ b/plat/xilinx/zynqmp/pm_service/pm_client.c
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2018, Arm Limited and Contributors. All rights reserved.
- * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -245,23 +245,6 @@
}
/**
- * pm_get_proc_by_node() - returns pointer to the proc structure.
- * @nid: node id of the processor.
- *
- * Return: pointer to a proc structure if proc is found, otherwise NULL.
- *
- */
-const struct pm_proc *pm_get_proc_by_node(enum pm_node_id nid)
-{
- for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) {
- if (nid == pm_procs_all[i].node_id) {
- return &pm_procs_all[i];
- }
- }
- return NULL;
-}
-
-/**
* pm_get_cpuid() - get the local cpu ID for a global node ID.
* @nid: node id of the processor.
*