tree e69882700c824d3b65f94d62e5d063fcae4c847c
parent ec8f40d99ecd32f4b8a765b1903ef498d91a03d4
author Omkar Anand Kulkarni <omkar.kulkarni@arm.com> 1689929989 +0530
committer Omkar Anand Kulkarni <omkar.kulkarni@arm.com> 1690904358 +0530

feat(arm): enable FHI PPI interrupt to report CPU errors

To handle the core corrected errors in the firmware, the FHI PPI
interrupt has to be enabled on all the cores. At boot, when the RAS
framework is initialized, only primary core is up and hence core FHI PPI
interrupt is enabled only on primary core. This patch adds support to
configure and enable core FHI interrupt for all the secondary cores as
part of their boot sequence.

Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com>
Change-Id: I4b25152cb498fe975b9c770babb25aa9e01f9656