Tegra: memctrl_v2: remove non-secure access to TZSRAM memory
This patch removes the memory controller configuration setting, which
allowed non-secure access to the TZSRAM memory.
Change-Id: Ic13645ba6a7694f192565962df40ca4fb8130f23
Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
diff --git a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c
index 18f3368..5986416 100644
--- a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c
+++ b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -679,13 +679,6 @@
tegra_mc_write_32(index, 0);
/*
- * Allow CPU read/write access to the aperture
- */
- tegra_mc_write_32(MC_TZRAM_CARVEOUT_CLIENT_ACCESS_CFG1,
- TZRAM_CARVEOUT_CPU_WRITE_ACCESS_BIT |
- TZRAM_CARVEOUT_CPU_READ_ACCESS_BIT);
-
- /*
* Set the TZRAM base. TZRAM base must be 4k aligned, at least.
*/
assert(!(phys_base & 0xFFF));