Merge changes from topic "css_refactor_arm" into integration
* changes:
refactor(console): consolidate console runtime switch
refactor(synquacer): console runtime switch on bl31 exit
refactor(nxp): console runtime switch on bl31 exit
refactor(nvidia): console runtime switch on bl31 exit
refactor(hisilicon): console runtime switch on bl31 exit
refactor(xilinx): console runtime switch on bl31 exit
refactor(mediatek): console runtime switch on bl31 exit
refactor(armada): console runtime switch on bl31 exit
refactor(imx): console runtime switch on bl31 exit
refactor(brcm): console runtime switch on bl31 exit
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c
index cae9b14..c0e9144 100644
--- a/bl31/bl31_main.c
+++ b/bl31/bl31_main.c
@@ -212,8 +212,6 @@
*/
bl31_prepare_next_image_entry();
- console_flush();
-
/*
* Perform any platform specific runtime setup prior to cold boot exit
* from BL31
@@ -221,9 +219,12 @@
bl31_plat_runtime_setup();
#if ENABLE_RUNTIME_INSTRUMENTATION
- PMF_CAPTURE_TIMESTAMP(bl_svc, BL31_EXIT, PMF_CACHE_MAINT);
console_flush();
+ PMF_CAPTURE_TIMESTAMP(bl_svc, BL31_EXIT, PMF_CACHE_MAINT);
#endif
+
+ console_flush();
+ console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*******************************************************************************
diff --git a/plat/allwinner/common/sunxi_bl31_setup.c b/plat/allwinner/common/sunxi_bl31_setup.c
index 1863292..24edd79 100644
--- a/plat/allwinner/common/sunxi_bl31_setup.c
+++ b/plat/allwinner/common/sunxi_bl31_setup.c
@@ -186,9 +186,6 @@
{
/* Change the DTB if the configuration requires so. */
sunxi_prepare_dtb(fdt);
-
- console_flush();
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
diff --git a/plat/brcm/common/brcm_bl31_setup.c b/plat/brcm/common/brcm_bl31_setup.c
index d3fa83d..6eef1d4 100644
--- a/plat/brcm/common/brcm_bl31_setup.c
+++ b/plat/brcm/common/brcm_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -235,8 +235,6 @@
******************************************************************************/
void brcm_bl31_plat_runtime_setup(void)
{
- console_switch_state(CONSOLE_FLAG_RUNTIME);
-
/* Initialize the runtime console */
bcm_console_runtime_init();
}
diff --git a/plat/common/aarch64/plat_common.c b/plat/common/aarch64/plat_common.c
index 19c4e48..54f2a03 100644
--- a/plat/common/aarch64/plat_common.c
+++ b/plat/common/aarch64/plat_common.c
@@ -35,8 +35,6 @@
void bl31_plat_runtime_setup(void)
{
- console_flush();
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*
diff --git a/plat/hisilicon/hikey/hikey_bl31_setup.c b/plat/hisilicon/hikey/hikey_bl31_setup.c
index 7d008e7..55b425c 100644
--- a/plat/hisilicon/hikey/hikey_bl31_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -149,7 +149,3 @@
hisi_ipc_init();
hisi_pwrc_setup();
}
-
-void bl31_plat_runtime_setup(void)
-{
-}
diff --git a/plat/hisilicon/hikey960/hikey960_bl31_setup.c b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
index 159eee9..6e80347 100644
--- a/plat/hisilicon/hikey960/hikey960_bl31_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/plat/hisilicon/poplar/bl31_plat_setup.c b/plat/hisilicon/poplar/bl31_plat_setup.c
index fe60ddc..5f4a18a 100644
--- a/plat/hisilicon/poplar/bl31_plat_setup.c
+++ b/plat/hisilicon/poplar/bl31_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -118,11 +118,6 @@
hisi_tzpc_sec_init();
}
-void bl31_plat_runtime_setup(void)
-{
- /* do nothing */
-}
-
void bl31_plat_arch_setup(void)
{
plat_configure_mmu_el3(BL31_BASE,
diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c
index bd7896a..4c63740 100644
--- a/plat/imx/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -408,8 +408,3 @@
{
return COUNTER_FREQUENCY;
}
-
-void bl31_plat_runtime_setup(void)
-{
- return;
-}
diff --git a/plat/imx/imx8qx/imx8qx_bl31_setup.c b/plat/imx/imx8qx/imx8qx_bl31_setup.c
index 13e80fb..08bf8f3 100644
--- a/plat/imx/imx8qx/imx8qx_bl31_setup.c
+++ b/plat/imx/imx8qx/imx8qx_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -386,8 +386,3 @@
{
return COUNTER_FREQUENCY;
}
-
-void bl31_plat_runtime_setup(void)
-{
- return;
-}
diff --git a/plat/imx/imx93/imx93_bl31_setup.c b/plat/imx/imx93/imx93_bl31_setup.c
index 8458f6c..a7d0f65 100644
--- a/plat/imx/imx93/imx93_bl31_setup.c
+++ b/plat/imx/imx93/imx93_bl31_setup.c
@@ -136,11 +136,6 @@
plat_gic_init();
}
-void bl31_plat_runtime_setup(void)
-{
- console_switch_state(CONSOLE_FLAG_RUNTIME);
-}
-
entry_point_info_t *bl31_plat_get_next_image_ep_info(unsigned int type)
{
if (type == NON_SECURE) {
diff --git a/plat/marvell/armada/common/marvell_bl31_setup.c b/plat/marvell/armada/common/marvell_bl31_setup.c
index 26ba906..b3641e3 100644
--- a/plat/marvell/armada/common/marvell_bl31_setup.c
+++ b/plat/marvell/armada/common/marvell_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2018 Marvell International Ltd.
+ * Copyright (C) 2018-2024 Marvell International Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
* https://spdx.org/licenses
@@ -181,8 +181,6 @@
*/
void marvell_bl31_plat_runtime_setup(void)
{
- console_switch_state(CONSOLE_FLAG_RUNTIME);
-
/* Initialize the runtime console */
marvell_console_runtime_init();
}
diff --git a/plat/mediatek/common/mtk_bl31_setup.c b/plat/mediatek/common/mtk_bl31_setup.c
index 7c9db8b..0d264b9 100644
--- a/plat/mediatek/common/mtk_bl31_setup.c
+++ b/plat/mediatek/common/mtk_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, MediaTek Inc. All rights reserved.
+ * Copyright (c) 2022-2024, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -166,7 +166,6 @@
void bl31_plat_runtime_setup(void)
{
mtk_init_one_level(MTK_INIT_LVL_PLAT_RUNTIME);
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
unsigned int plat_get_syscnt_freq2(void)
diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c
index e3068b6..09eda84 100644
--- a/plat/nvidia/tegra/common/tegra_bl31_setup.c
+++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2023, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
diff --git a/plat/socionext/synquacer/sq_bl31_setup.c b/plat/socionext/synquacer/sq_bl31_setup.c
index 967437b..e46d877 100644
--- a/plat/socionext/synquacer/sq_bl31_setup.c
+++ b/plat/socionext/synquacer/sq_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/plat/xilinx/versal/bl31_versal_setup.c b/plat/xilinx/versal/bl31_versal_setup.c
index d19a263..08c0205 100644
--- a/plat/xilinx/versal/bl31_versal_setup.c
+++ b/plat/xilinx/versal/bl31_versal_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
*
@@ -206,8 +206,6 @@
if (rc != 0) {
panic();
}
-
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*
diff --git a/plat/xilinx/versal_net/bl31_versal_net_setup.c b/plat/xilinx/versal_net/bl31_versal_net_setup.c
index 614d6d2..b38f394 100644
--- a/plat/xilinx/versal_net/bl31_versal_net_setup.c
+++ b/plat/xilinx/versal_net/bl31_versal_net_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
*
@@ -231,8 +231,6 @@
if (rc != 0) {
panic();
}
-
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*
diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index baf6717..0a34f72 100644
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -190,8 +190,6 @@
#endif
custom_runtime_setup();
-
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*