feat(msm8916): add SP_MIN port for AArch32
Use the new shared msm8916 setup code to allow compiling the minimal
AArch32 Secure Payload (SP_MIN) as simple PSCI implementation.
AArch64 is preferred for the Cortex-A53 cores in MSM8916 but there are
some similar platforms with AArch32-only Cortex-A7 cores that can
benefit from this in future changes.
The AArch32 assembly implementation for msm8916_helpers.S and
uartdm_console.S is a direct port of the AArch64 implementation.
Only plat_get_my_entrypoint is slightly different because there is no
need to handle the "boot remapper" on cold boot for AArch32.
Change-Id: Idf160e86fb3e685fcedec3e051400e6273997b74
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
diff --git a/plat/qti/msm8916/include/platform_def.h b/plat/qti/msm8916/include/platform_def.h
index 4677f06..f6ba1cc 100644
--- a/plat/qti/msm8916/include/platform_def.h
+++ b/plat/qti/msm8916/include/platform_def.h
@@ -8,6 +8,7 @@
#include <plat/common/common_def.h>
+#ifdef __aarch64__
/*
* There is at least 1 MiB available for BL31. However, at the moment the
* "msm8916_entry_point" variable in the data section is read through the
@@ -18,6 +19,7 @@
*/
#define BL31_LIMIT (BL31_BASE + SZ_128K)
#define BL31_PROGBITS_LIMIT (BL31_BASE + SZ_64K)
+#endif
#define BL32_LIMIT (BL32_BASE + SZ_128K)
#define CACHE_WRITEBACK_GRANULE U(64)