diff --git a/drivers/renesas/rcar/pwrc/call_sram.S b/drivers/renesas/rcar/pwrc/call_sram.S
index 7c96b7e..aa8644c 100644
--- a/drivers/renesas/rcar/pwrc/call_sram.S
+++ b/drivers/renesas/rcar/pwrc/call_sram.S
@@ -1,21 +1,13 @@
 /*
- * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
 #include <arch.h>
 #include <asm_macros.S>
-#include "rcar_def.h"
 
 .global rcar_pwrc_switch_stack
-.global rcar_pwrc_save_generic_timer
-.global rcar_pwrc_restore_generic_timer
-
-#define OFFSET_SP_X9_X10	(0x00)
-#define OFFSET_CNTFID0		(0x10)
-#define OFFSET_CNTPCT_EL0	(0x18)
-#define OFFSET_TIMER_COUNT	(0x20)
 
 /*
  * x0 : jump address,
@@ -54,37 +46,3 @@
 	ldp	x29, x30, [sp,#-16]
 	ret
 endfunc rcar_pwrc_switch_stack
-
-/* x0 : stack pointer base address */
-func rcar_pwrc_save_generic_timer
-
-	stp	x9, x10, [x0, #OFFSET_SP_X9_X10]
-
-	/* save CNTFID0 and cntpct_el0 */
-	mov_imm	x10, (RCAR_CNTC_BASE + CNTFID_OFF)
-	ldr	x9, [x10]
-	mrs	x10, cntpct_el0
-	stp	x9, x10, [x0, #OFFSET_CNTFID0]
-
-	ldp	x9, x10, [x0, #OFFSET_SP_X9_X10]
-
-	ret
-endfunc rcar_pwrc_save_generic_timer
-
-/* x0 : Stack pointer base address */
-func rcar_pwrc_restore_generic_timer
-
-	stp	x9, x10, [x0, #OFFSET_SP_X9_X10]
-
-	/* restore CNTFID0 and cntpct_el0 */
-	ldr	x10, [x0, #OFFSET_CNTFID0]
-	mov_imm	x9, (RCAR_CNTC_BASE + CNTFID_OFF)
-	str	x10, [x9]
-	ldp	x9, x10, [x0, #OFFSET_CNTPCT_EL0]
-	add	x9, x9, x10
-	str	x9, [x0, #OFFSET_TIMER_COUNT]
-
-	ldp	x9, x10, [x0, #OFFSET_SP_X9_X10]
-
-	ret
-endfunc rcar_pwrc_restore_generic_timer
diff --git a/drivers/renesas/rcar/pwrc/pwrc.c b/drivers/renesas/rcar/pwrc/pwrc.c
index e223f07..d97e593 100644
--- a/drivers/renesas/rcar/pwrc/pwrc.c
+++ b/drivers/renesas/rcar/pwrc/pwrc.c
@@ -13,6 +13,7 @@
 #include <lib/bakery_lock.h>
 #include <lib/mmio.h>
 #include <lib/xlat_tables/xlat_tables_v2.h>
+#include <plat/common/platform.h>
 
 #include "iic_dvfs.h"
 #include "rcar_def.h"
@@ -126,6 +127,14 @@
 #define	RST_MODEMR				(RST_BASE + 0x0060U)
 #define	RST_MODEMR_BIT0				(0x00000001U)
 
+#define RCAR_CNTCR_OFF				(0x00U)
+#define RCAR_CNTCVL_OFF				(0x08U)
+#define RCAR_CNTCVU_OFF				(0x0CU)
+#define RCAR_CNTFID_OFF				(0x20U)
+
+#define RCAR_CNTCR_EN				((uint32_t)1U << 0U)
+#define RCAR_CNTCR_FCREQ(x)			((uint32_t)(x) << 8U)
+
 #if PMIC_ROHM_BD9571
 #define	BIT_BKUP_CTRL_OUT			((uint8_t)(1U << 4))
 #define	PMIC_BKUP_MODE_CNT			(0x20U)
@@ -323,6 +332,39 @@
 	rcar_lock_release();
 }
 
+static uint64_t rcar_pwrc_saved_cntpct_el0;
+static uint32_t rcar_pwrc_saved_cntfid;
+
+#if RCAR_SYSTEM_SUSPEND
+static void rcar_pwrc_save_timer_state(void)
+{
+	rcar_pwrc_saved_cntpct_el0 = read_cntpct_el0();
+
+	rcar_pwrc_saved_cntfid =
+		mmio_read_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTFID_OFF));
+}
+#endif
+
+void rcar_pwrc_restore_timer_state(void)
+{
+	/* Stop timer before restoring counter value */
+	mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCR_OFF), 0U);
+
+	mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVL_OFF),
+		(uint32_t)(rcar_pwrc_saved_cntpct_el0 & 0xFFFFFFFFU));
+	mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVU_OFF),
+		(uint32_t)(rcar_pwrc_saved_cntpct_el0 >> 32U));
+
+	mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTFID_OFF),
+		rcar_pwrc_saved_cntfid);
+
+	/* Start generic timer back */
+	write_cntfrq_el0((u_register_t)plat_get_syscnt_freq2());
+
+	mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCR_OFF),
+		(RCAR_CNTCR_FCREQ(0U) | RCAR_CNTCR_EN));
+}
+
 #if !PMIC_ROHM_BD9571
 void rcar_pwrc_system_reset(void)
 {
@@ -640,7 +682,7 @@
 				       DEVICE_SRAM_STACK_SIZE);
 	uint32_t sctlr;
 
-	rcar_pwrc_save_generic_timer(rcar_stack_generic_timer);
+	rcar_pwrc_save_timer_state();
 
 	/* disable MMU */
 	sctlr = (uint32_t) read_sctlr_el3();
diff --git a/drivers/renesas/rcar/pwrc/pwrc.h b/drivers/renesas/rcar/pwrc/pwrc.h
index d4d6fc4..cfb35ff 100644
--- a/drivers/renesas/rcar/pwrc/pwrc.h
+++ b/drivers/renesas/rcar/pwrc/pwrc.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -52,6 +52,7 @@
 uint32_t rcar_pwrc_get_cluster(void);
 uint32_t rcar_pwrc_get_mpidr_cluster(uint64_t mpidr);
 uint32_t rcar_pwrc_get_cpu_num(uint32_t cluster_type);
+void rcar_pwrc_restore_timer_state(void);
 void plat_secondary_reset(void);
 
 void rcar_pwrc_code_copy_to_system_ram(void);
@@ -67,12 +68,8 @@
 void rcar_pwrc_suspend_to_ram(void);
 #endif
 
-extern void rcar_pwrc_save_generic_timer(uint64_t *rcar_stack_generic_timer);
 extern uint32_t rcar_pwrc_switch_stack(uintptr_t jump, uintptr_t stack,
 				       void *arg);
-
-extern uint64_t rcar_stack_generic_timer[5];
-
 #endif
 
 #endif /* PWRC_H */