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git01.mediatek.com / filogic / atf / b51f82fdb1a3f7ef8720e42ceb1ac78a27642fd2 / . / docs / diagrams
tree: 577ecc2ebdae107e03cfbc89d610c8965e2e03bd [path history] [tgz]
  1. default_reset_code.png
  2. fwu_flow.png
  3. fwu_states.png
  4. int_handling.dia
  5. Makefile
  6. non-sec-int-handling.png
  7. psci-suspend-sequence.png
  8. reset_code_flow.dia
  9. reset_code_no_boot_type_check.png
  10. reset_code_no_checks.png
  11. reset_code_no_cpu_check.png
  12. romlib_design.dia
  13. romlib_design.png
  14. romlib_wrapper.dia
  15. romlib_wrapper.png
  16. rt-svc-descs-layout.png
  17. sec-int-handling.png
  18. secure_sw_stack_sp.png
  19. secure_sw_stack_tos.png
  20. xlat_align.dia
  21. xlat_align.png