| commit | 20e01375001109e26d6739ac821fb1237379c9a1 | [log] [tgz] |
|---|---|---|
| author | Oliver Swede <oli.swede@arm.com> | Mon Dec 02 13:33:40 2019 +0000 |
| committer | Oliver Swede <oli.swede@arm.com> | Thu Mar 26 20:40:50 2020 +0000 |
| tree | b5a955547342b2608456438fdfd716bab3ee185b | |
| parent | 6e86c5ad5fec171d6bfcb685b0be82bde1250502 [diff] |
plat/arm/board/arm_fpga: Initialize the System Counter This sets the frequency of the system counter so that the Delay Timer driver programs the correct value to CNTCRL. This value depends on the FPGA image being used, and is 10MHz for the initial test image. Once configured, the BL31 platform setup sequence then enables the system counter. Signed-off-by: Oliver Swede <oli.swede@arm.com> Change-Id: Ieb036a36fd990f350b5953357424a255b8ac5d5a