tree e30c53e4025a3da784ef4d3f9f1c52341bdb0745
parent 1165717bcba28cb0ad85c95bbd03c96771620af1
author Sieu Mun Tang <sieu.mun.tang@intel.com> 1697386538 +0800
committer Jit Loon Lim <jit.loon.lim@intel.com> 1699017531 +0800

fix(intel): update HPS bridges for Agilex5 SoC FPGA

This patch is used to update reset manager support
for Agilex5 Soc FPGA.
	1. Update HPS bridges support for socfpga_bridges_disable
		a. SOC2FPGA
		b. LWSOC2FPGA
		c. F2SDRAM
		d. F2SOC

Change-Id: Ia539ff289e83303ae3b4d78b9ac1d50c9f9558da
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>