| commit | b0d19fb052a1b1afd8eca3e37ba12d7d9bdf3dd1 | [log] [tgz] |
|---|---|---|
| author | Manish V Badarkhe <manish.badarkhe@arm.com> | Thu Aug 29 16:58:07 2024 +0200 |
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Thu Aug 29 16:58:07 2024 +0200 |
| tree | e8696a09b95fdef249658e5c21ae41bc30dad600 | |
| parent | 3e9fe1ba50ccc454fe0986701b4670fc5b9cd1b2 [diff] | |
| parent | 9e8e8930a193a8e051b4e1eed434c846db2bf5a6 [diff] |
Merge changes from topic "us_tc4_rebase_v2" into integration * changes: feat(tc): bind DPU SMMU on TC4 feat(tc): bind GPU SMMU on TC4 feat(tc): update DT for Drage GPU feat(tc): enable SME and SME2 options for TC4 feat(tc): add new TC4 RoS definitions feat(tc): add system generic timer register definition for TC4 feat(tc): allow TARGET_VERSION=4 feat(tc): add MHUv3 register addresses for TC4 feat(tc): add device tree binding for TC4