feat(xilinx): add device node indexes
Add additional Versal NET device node indexes to the existing list
that are for new APU cores, RPU cores, OCM and TCM memories, USB 1
and WDT devices.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iea0570ae5d81de9c5b2793329ae1e7284b6c5a3f
diff --git a/plat/xilinx/common/include/pm_node.h b/plat/xilinx/common/include/pm_node.h
index 9730367..0d5616c 100644
--- a/plat/xilinx/common/include/pm_node.h
+++ b/plat/xilinx/common/include/pm_node.h
@@ -187,7 +187,57 @@
XPM_NODEIDX_DEV_GT_9 = 0x52,
XPM_NODEIDX_DEV_GT_10 = 0x53,
- XPM_NODEIDX_DEV_MAX = 0x54,
+#if defined(PLAT_versal_net)
+ XPM_NODEIDX_DEV_ACPU_0_0 = 0x54,
+ XPM_NODEIDX_DEV_ACPU_0_1 = 0x55,
+ XPM_NODEIDX_DEV_ACPU_0_2 = 0x56,
+ XPM_NODEIDX_DEV_ACPU_0_3 = 0x57,
+ XPM_NODEIDX_DEV_ACPU_1_0 = 0x58,
+ XPM_NODEIDX_DEV_ACPU_1_1 = 0x59,
+ XPM_NODEIDX_DEV_ACPU_1_2 = 0x5A,
+ XPM_NODEIDX_DEV_ACPU_1_3 = 0x5B,
+ XPM_NODEIDX_DEV_ACPU_2_0 = 0x5C,
+ XPM_NODEIDX_DEV_ACPU_2_1 = 0x5D,
+ XPM_NODEIDX_DEV_ACPU_2_2 = 0x5E,
+ XPM_NODEIDX_DEV_ACPU_2_3 = 0x5F,
+ XPM_NODEIDX_DEV_ACPU_3_0 = 0x60,
+ XPM_NODEIDX_DEV_ACPU_3_1 = 0x61,
+ XPM_NODEIDX_DEV_ACPU_3_2 = 0x62,
+ XPM_NODEIDX_DEV_ACPU_3_3 = 0x63,
+ XPM_NODEIDX_DEV_RPU_A_0 = 0x64,
+ XPM_NODEIDX_DEV_RPU_A_1 = 0x65,
+ XPM_NODEIDX_DEV_RPU_B_0 = 0x66,
+ XPM_NODEIDX_DEV_RPU_B_1 = 0x67,
+ XPM_NODEIDX_DEV_OCM_0_0 = 0x68,
+ XPM_NODEIDX_DEV_OCM_0_1 = 0x69,
+ XPM_NODEIDX_DEV_OCM_0_2 = 0x6A,
+ XPM_NODEIDX_DEV_OCM_0_3 = 0x6B,
+ XPM_NODEIDX_DEV_OCM_1_0 = 0x6C,
+ XPM_NODEIDX_DEV_OCM_1_1 = 0x6D,
+ XPM_NODEIDX_DEV_OCM_1_2 = 0x6E,
+ XPM_NODEIDX_DEV_OCM_1_3 = 0x6F,
+ XPM_NODEIDX_DEV_TCM_A_0A = 0x70,
+ XPM_NODEIDX_DEV_TCM_A_0B = 0x71,
+ XPM_NODEIDX_DEV_TCM_A_0C = 0x72,
+ XPM_NODEIDX_DEV_TCM_A_1A = 0x73,
+ XPM_NODEIDX_DEV_TCM_A_1B = 0x74,
+ XPM_NODEIDX_DEV_TCM_A_1C = 0x75,
+ XPM_NODEIDX_DEV_TCM_B_0A = 0x76,
+ XPM_NODEIDX_DEV_TCM_B_0B = 0x77,
+ XPM_NODEIDX_DEV_TCM_B_0C = 0x78,
+ XPM_NODEIDX_DEV_TCM_B_1A = 0x79,
+ XPM_NODEIDX_DEV_TCM_B_1B = 0x7A,
+ XPM_NODEIDX_DEV_TCM_B_1C = 0x7B,
+ XPM_NODEIDX_DEV_USB_1 = 0x7C,
+ XPM_NODEIDX_DEV_PMC_WWDT = 0x7D,
+ XPM_NODEIDX_DEV_LPD_SWDT_0 = 0x7E,
+ XPM_NODEIDX_DEV_LPD_SWDT_1 = 0x7F,
+ XPM_NODEIDX_DEV_FPD_SWDT_0 = 0x80,
+ XPM_NODEIDX_DEV_FPD_SWDT_1 = 0x81,
+ XPM_NODEIDX_DEV_FPD_SWDT_2 = 0x82,
+ XPM_NODEIDX_DEV_FPD_SWDT_3 = 0x83,
+#endif
+ XPM_NODEIDX_DEV_MAX,
};
#endif /* PM_NODE_H */