fix(cpus): workaround for Neoverse V2 erratum 2618597
Neoverse V2 erratum 2618597 is a Cat B erratum that applies to
all revisions <= r0p1 and is fixed in r0p2. The workaround is to
disable the use of the Full Retention power mode in the core (setting
WFI_RET_CTRL and WFE_RET_CTRL in IMP_CPUPWRCTLR_EL1 to 0b000).
SDEN can be found here:
https://developer.arm.com/documentation/SDEN-2332927/latest
Change-Id: I23a81275d1e40cae39e6897093d6cdd3e11c08ea
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
diff --git a/include/lib/cpus/aarch64/neoverse_v2.h b/include/lib/cpus/aarch64/neoverse_v2.h
index a0aeaba..39a6607 100644
--- a/include/lib/cpus/aarch64/neoverse_v2.h
+++ b/include/lib/cpus/aarch64/neoverse_v2.h
@@ -22,6 +22,10 @@
******************************************************************************/
#define NEOVERSE_V2_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define NEOVERSE_V2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
+#define NEOVERSE_V2_CPUPWRCTLR_EL1_WFI_RET_CTRL_SHIFT U(4)
+#define NEOVERSE_V2_CPUPWRCTLR_EL1_WFI_RET_CTRL_WIDTH U(3)
+#define NEOVERSE_V2_CPUPWRCTLR_EL1_WFE_RET_CTRL_SHIFT U(7)
+#define NEOVERSE_V2_CPUPWRCTLR_EL1_WFE_RET_CTRL_WIDTH U(3)
/*******************************************************************************
* CPU Extended Control register 2 specific definitions.