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git01.mediatek.com / filogic / atf / afcf3fa84db7a9ab44f9451d39d5a6f717fd5a67 / . / plat / xilinx / versal_net
tree: be5677a4b14824b2e2e54ec4c231a9de5b56e350 [path history] [tgz]
  1. aarch64/
  2. include/
  3. pm_service/
  4. bl31_versal_net_setup.c
  5. plat_psci.c
  6. plat_psci_pm.c
  7. plat_topology.c
  8. platform.mk
  9. sip_svc_setup.c
  10. versal_net_gicv3.c
  11. versal_net_ipi.c