commit afab55cb0bba2aeaeb36f0d7ccc13bee539dc375
author Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Mon Jul 12 18:30:07 2021 +0900
committer Marek Vasut <marek.vasut+renesas@gmail.com> Sun Oct 15 05:07:20 2023 +0200
tree 8feb2b6cab39ebe73c0bba9ce78d5f0d7a8d9447
parent 9607c72fa5c11f19177fcd5bf3d8033e19e82c00

fix(rcar3): fix CPG register code comment

Update the code comment to match referenced register.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ie0ddbe0bffd31794425f0967c865e2928ce8d78d

plat/renesas/common/include/registers/cpg_registers.h

diff --git a/plat/renesas/common/include/registers/cpg_registers.h b/plat/renesas/common/include/registers/cpg_registers.h
index 5d2bb9e..277f11b 100644
--- a/plat/renesas/common/include/registers/cpg_registers.h
+++ b/plat/renesas/common/include/registers/cpg_registers.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2015-2023, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -16,7 +16,7 @@
 #define CPG_SRCR2	(CPG_BASE + 0x00B0U)
 /* CPG module stop status 2 */
 #define CPG_MSTPSR2	(CPG_BASE + 0x0040U)
-/* CPG module stop status 2 */
+/* CPG module stop status 3 */
 #define CPG_MSTPSR3	(CPG_BASE + 0x0048U)
 /* CPG write protect */
 #define CPG_CPGWPR	(CPG_BASE + 0x0900U)