diff --git a/drivers/arm/gic/v3/gicv3_main.c b/drivers/arm/gic/v3/gicv3_main.c
index 0f50f6d..8c4f508 100644
--- a/drivers/arm/gic/v3/gicv3_main.c
+++ b/drivers/arm/gic/v3/gicv3_main.c
@@ -9,6 +9,7 @@
 #include <assert.h>
 #include <debug.h>
 #include <gicv3.h>
+#include <interrupt_props.h>
 #include <spinlock.h>
 #include "gicv3_private.h"
 
@@ -66,23 +67,33 @@
 
 	assert(IS_IN_EL3());
 
-	/*
-	 * The platform should provide a list of at least one type of
-	 * interrupts
-	 */
-	assert(plat_driver_data->g0_interrupt_array ||
-	       plat_driver_data->g1s_interrupt_array);
+#if !ERROR_DEPRECATED
+	if (plat_driver_data->interrupt_props == NULL) {
+		/* Interrupt properties array size must be 0 */
+		assert(plat_driver_data->interrupt_props_num == 0);
 
-	/*
-	 * If there are no interrupts of a particular type, then the number of
-	 * interrupts of that type should be 0 and vice-versa.
-	 */
-	assert(plat_driver_data->g0_interrupt_array ?
-	       plat_driver_data->g0_interrupt_num :
-	       plat_driver_data->g0_interrupt_num == 0);
-	assert(plat_driver_data->g1s_interrupt_array ?
-	       plat_driver_data->g1s_interrupt_num :
-	       plat_driver_data->g1s_interrupt_num == 0);
+		/*
+		 * The platform should provide a list of at least one type of
+		 * interrupt.
+		 */
+		assert(plat_driver_data->g0_interrupt_array ||
+				plat_driver_data->g1s_interrupt_array);
+
+		/*
+		 * If there are no interrupts of a particular type, then the
+		 * number of interrupts of that type should be 0 and vice-versa.
+		 */
+		assert(plat_driver_data->g0_interrupt_array ?
+				plat_driver_data->g0_interrupt_num :
+				plat_driver_data->g0_interrupt_num == 0);
+		assert(plat_driver_data->g1s_interrupt_array ?
+				plat_driver_data->g1s_interrupt_num :
+				plat_driver_data->g1s_interrupt_num == 0);
+	}
+#else
+	assert(plat_driver_data->interrupt_props != NULL);
+	assert(plat_driver_data->interrupt_props_num > 0);
+#endif
 
 	/* Check for system register support */
 #ifdef AARCH32
@@ -148,8 +159,6 @@
 
 	assert(gicv3_driver_data);
 	assert(gicv3_driver_data->gicd_base);
-	assert(gicv3_driver_data->g1s_interrupt_array ||
-	       gicv3_driver_data->g0_interrupt_array);
 
 	assert(IS_IN_EL3());
 
@@ -171,23 +180,37 @@
 	/* Set the default attribute of all SPIs */
 	gicv3_spis_configure_defaults(gicv3_driver_data->gicd_base);
 
-	/* Configure the G1S SPIs */
-	if (gicv3_driver_data->g1s_interrupt_array) {
-		gicv3_secure_spis_configure(gicv3_driver_data->gicd_base,
+#if !ERROR_DEPRECATED
+	if (gicv3_driver_data->interrupt_props != NULL) {
+#endif
+		bitmap = gicv3_secure_spis_configure_props(
+				gicv3_driver_data->gicd_base,
+				gicv3_driver_data->interrupt_props,
+				gicv3_driver_data->interrupt_props_num);
+#if !ERROR_DEPRECATED
+	} else {
+		assert(gicv3_driver_data->g1s_interrupt_array ||
+				gicv3_driver_data->g0_interrupt_array);
+
+		/* Configure the G1S SPIs */
+		if (gicv3_driver_data->g1s_interrupt_array) {
+			gicv3_secure_spis_configure(gicv3_driver_data->gicd_base,
 					gicv3_driver_data->g1s_interrupt_num,
 					gicv3_driver_data->g1s_interrupt_array,
 					INTR_GROUP1S);
-		bitmap |= CTLR_ENABLE_G1S_BIT;
-	}
+			bitmap |= CTLR_ENABLE_G1S_BIT;
+		}
 
-	/* Configure the G0 SPIs */
-	if (gicv3_driver_data->g0_interrupt_array) {
-		gicv3_secure_spis_configure(gicv3_driver_data->gicd_base,
+		/* Configure the G0 SPIs */
+		if (gicv3_driver_data->g0_interrupt_array) {
+			gicv3_secure_spis_configure(gicv3_driver_data->gicd_base,
 					gicv3_driver_data->g0_interrupt_num,
 					gicv3_driver_data->g0_interrupt_array,
 					INTR_GROUP0);
-		bitmap |= CTLR_ENABLE_G0_BIT;
+			bitmap |= CTLR_ENABLE_G0_BIT;
+		}
 	}
+#endif
 
 	/* Enable the secure SPIs now that they have been configured */
 	gicd_set_ctlr(gicv3_driver_data->gicd_base, bitmap, RWP_TRUE);
@@ -207,8 +230,6 @@
 	assert(gicv3_driver_data->rdistif_base_addrs);
 	assert(gicv3_driver_data->gicd_base);
 	assert(gicd_read_ctlr(gicv3_driver_data->gicd_base) & CTLR_ARE_S_BIT);
-	assert(gicv3_driver_data->g1s_interrupt_array ||
-	       gicv3_driver_data->g0_interrupt_array);
 
 	assert(IS_IN_EL3());
 
@@ -220,21 +241,34 @@
 	/* Set the default attribute of all SGIs and PPIs */
 	gicv3_ppi_sgi_configure_defaults(gicr_base);
 
-	/* Configure the G1S SGIs/PPIs */
-	if (gicv3_driver_data->g1s_interrupt_array) {
-		gicv3_secure_ppi_sgi_configure(gicr_base,
+#if !ERROR_DEPRECATED
+	if (gicv3_driver_data->interrupt_props != NULL) {
+#endif
+		gicv3_secure_ppi_sgi_configure_props(gicr_base,
+				gicv3_driver_data->interrupt_props,
+				gicv3_driver_data->interrupt_props_num);
+#if !ERROR_DEPRECATED
+	} else {
+		assert(gicv3_driver_data->g1s_interrupt_array ||
+		       gicv3_driver_data->g0_interrupt_array);
+
+		/* Configure the G1S SGIs/PPIs */
+		if (gicv3_driver_data->g1s_interrupt_array) {
+			gicv3_secure_ppi_sgi_configure(gicr_base,
 					gicv3_driver_data->g1s_interrupt_num,
 					gicv3_driver_data->g1s_interrupt_array,
 					INTR_GROUP1S);
-	}
+		}
 
-	/* Configure the G0 SGIs/PPIs */
-	if (gicv3_driver_data->g0_interrupt_array) {
-		gicv3_secure_ppi_sgi_configure(gicr_base,
+		/* Configure the G0 SGIs/PPIs */
+		if (gicv3_driver_data->g0_interrupt_array) {
+			gicv3_secure_ppi_sgi_configure(gicr_base,
 					gicv3_driver_data->g0_interrupt_num,
 					gicv3_driver_data->g0_interrupt_array,
 					INTR_GROUP0);
+		}
 	}
+#endif
 }
 
 /*******************************************************************************