zynqmp: pm: Implement IOCTL APIs for device control
Implement ioctl APIs which uses MMIO operations
to configure devices. Below IOCTLs are supported
in this patch:
* Set tap delay bypass
* Set SGMII mode
* SD reset
* Set SD/MMC tap delay
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
diff --git a/plat/xilinx/zynqmp/zynqmp_def.h b/plat/xilinx/zynqmp/zynqmp_def.h
index 54036f9..f3180e9 100644
--- a/plat/xilinx/zynqmp/zynqmp_def.h
+++ b/plat/xilinx/zynqmp/zynqmp_def.h
@@ -186,4 +186,43 @@
#define ZYNQMP_SLCLAMP_MASK 0x10
#define ZYNQMP_VINITHI_MASK 0x04
+/* Tap delay bypass */
+#define IOU_TAPDLY_BYPASS 0XFF180390
+#define TAP_DELAY_MASK 0x7
+
+/* SGMII mode */
+#define IOU_GEM_CTRL 0xFF180360
+#define IOU_GEM_CLK_CTRL 0xFF180308
+#define SGMII_SD_MASK 0x3
+#define SGMII_SD_OFFSET 2
+#define SGMII_PCS_SD_0 0x0
+#define SGMII_PCS_SD_1 0x1
+#define SGMII_PCS_SD_PHY 0x2
+#define GEM_SGMII_MASK 0x4
+#define GEM_CLK_CTRL_MASK 0xF
+#define GEM_CLK_CTRL_OFFSET 5
+#define GEM_RX_SRC_SEL_GTR 0x1
+#define GEM_SGMII_MODE 0x4
+
+/* SD DLL reset */
+#define ZYNQMP_SD_DLL_CTRL 0xFF180358
+#define ZYNQMP_SD0_DLL_RST_MASK 0x00000004
+#define ZYNQMP_SD0_DLL_RST 0x00000004
+#define ZYNQMP_SD1_DLL_RST_MASK 0x00040000
+#define ZYNQMP_SD1_DLL_RST 0x00040000
+
+/* SD tap delay */
+#define ZYNQMP_SD_DLL_CTRL 0xFF180358
+#define ZYNQMP_SD_ITAP_DLY 0xFF180314
+#define ZYNQMP_SD_OTAP_DLY 0xFF180318
+#define ZYNQMP_SD_TAP_OFFSET 16
+#define ZYNQMP_SD_ITAPCHGWIN_MASK 0x200
+#define ZYNQMP_SD_ITAPCHGWIN 0x200
+#define ZYNQMP_SD_ITAPDLYENA_MASK 0x100
+#define ZYNQMP_SD_ITAPDLYENA 0x100
+#define ZYNQMP_SD_ITAPDLYSEL_MASK 0xFF
+#define ZYNQMP_SD_OTAPDLYSEL_MASK 0x3F
+#define ZYNQMP_SD_OTAPDLYENA_MASK 0x40
+#define ZYNQMP_SD_OTAPDLYENA 0x40
+
#endif /* __ZYNQMP_DEF_H__ */