diff --git a/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c b/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
index b89cd97..4cafd29 100644
--- a/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+++ b/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
@@ -27,6 +27,7 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
+#include <arch.h>
 #include <mmio.h>
 #include <mt8173_def.h>
 #include <platform.h>
@@ -258,7 +259,9 @@
 {
 	unsigned long linear_id;
 
-	linear_id = platform_get_core_pos(mpidr);
+	linear_id = ((mpidr & MPIDR_CLUSTER_MASK) >> 6) |
+			(mpidr & MPIDR_CPU_MASK);
+
 	spm_lock_get();
 	if (is_hotplug_ready() == 0) {
 		spm_mcdi_wakeup_all_cores();
@@ -277,7 +280,9 @@
 {
 	unsigned long linear_id;
 
-	linear_id = platform_get_core_pos(mpidr);
+	linear_id = ((mpidr & MPIDR_CLUSTER_MASK) >> 6) |
+			(mpidr & MPIDR_CPU_MASK);
+
 	spm_lock_get();
 	if (is_hotplug_ready() == 0) {
 		spm_mcdi_wakeup_all_cores();
diff --git a/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c b/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
index d715735..4d8422f 100644
--- a/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+++ b/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
@@ -511,7 +511,10 @@
 
 void spm_mcdi_finish_for_on_state(unsigned long mpidr, unsigned int afflvl)
 {
-	unsigned long linear_id = platform_get_core_pos(mpidr);
+	unsigned long linear_id;
+
+	linear_id = ((mpidr & MPIDR_CLUSTER_MASK) >> 6) |
+			(mpidr & MPIDR_CPU_MASK);
 
 	spm_lock_get();
 	spm_mcdi_clear_cputop_pwrctrl_for_cluster_on(mpidr);
diff --git a/plat/mediatek/mt8173/include/platform_def.h b/plat/mediatek/mt8173/include/platform_def.h
index 4422e4f..bb69920 100644
--- a/plat/mediatek/mt8173/include/platform_def.h
+++ b/plat/mediatek/mt8173/include/platform_def.h
@@ -118,7 +118,8 @@
 /*******************************************************************************
  * Platform specific page table and MMU setup constants
  ******************************************************************************/
-#define ADDR_SPACE_SIZE		(1ull << 32)
+#define PLAT_PHY_ADDR_SPACE_SIZE	(1ull << 32)
+#define PLAT_VIRT_ADDR_SPACE_SIZE	(1ull << 32)
 #define MAX_XLAT_TABLES		4
 #define MAX_MMAP_REGIONS	16