Merge changes from topic "imx93_basic_support" into integration
* changes:
docs(imx9): add imx93 platform
feat(imx93): add OPTEE support
feat(imx93): protect OPTEE memory to secure access only
feat(imx93): add cpuidle and basic suspend support
feat(imx93): add reset & poweroff support
feat(imx93): allow SoC masters access to system TCM
feat(imx93): update the ocram trdc config for did10
feat(imx93): add the basic support
feat(imx93): add the trdc driver
build(changelog): add new scopes for nxp imx platform
diff --git a/Makefile b/Makefile
index 8a0a2e0..f33a12e 100644
--- a/Makefile
+++ b/Makefile
@@ -220,14 +220,6 @@
# Will set march-directive from platform configuration
else
target32-directive = -target armv8a-none-eabi
-
-# Set the compiler's target architecture profile based on
-# ARM_ARCH_MAJOR ARM_ARCH_MINOR options
- ifeq (${ARM_ARCH_MINOR},0)
- march-directive = -march=armv${ARM_ARCH_MAJOR}-a
- else
- march-directive = -march=armv${ARM_ARCH_MAJOR}.${ARM_ARCH_MINOR}-a
- endif #(ARM_ARCH_MINOR)
endif #(ARM_ARCH_MAJOR)
################################################################################
@@ -279,12 +271,12 @@
ifneq ($(findstring clang,$(notdir $(CC))),)
ifneq ($(findstring armclang,$(notdir $(CC))),)
- TF_CFLAGS_aarch32 := -target arm-arm-none-eabi $(march-directive)
- TF_CFLAGS_aarch64 := -target aarch64-arm-none-eabi $(march-directive)
+ TF_CFLAGS_aarch32 := -target arm-arm-none-eabi
+ TF_CFLAGS_aarch64 := -target aarch64-arm-none-eabi
LD := $(LINKER)
else
- TF_CFLAGS_aarch32 = $(target32-directive) $(march-directive)
- TF_CFLAGS_aarch64 := -target aarch64-elf $(march-directive)
+ TF_CFLAGS_aarch32 = $(target32-directive)
+ TF_CFLAGS_aarch64 := -target aarch64-elf
LD := $(shell $(CC) --print-prog-name ld.lld)
AR := $(shell $(CC) --print-prog-name llvm-ar)
@@ -296,8 +288,6 @@
PP := $(CC) -E $(TF_CFLAGS_$(ARCH))
AS := $(CC) -c -x assembler-with-cpp $(TF_CFLAGS_$(ARCH))
else ifneq ($(findstring gcc,$(notdir $(CC))),)
- TF_CFLAGS_aarch32 = $(march-directive)
- TF_CFLAGS_aarch64 = $(march-directive)
ifeq ($(ENABLE_LTO),1)
# Enable LTO only for aarch64
ifeq (${ARCH},aarch64)
@@ -308,8 +298,6 @@
endif
LD = $(LINKER)
else
- TF_CFLAGS_aarch32 = $(march-directive)
- TF_CFLAGS_aarch64 = $(march-directive)
LD = $(LINKER)
endif #(clang)
@@ -671,6 +659,14 @@
include ${PLAT_MAKEFILE_FULL}
+################################################################################
+# Platform specific Makefile might provide us ARCH_MAJOR/MINOR use that to come
+# up with appropriate march values for compiler.
+################################################################################
+include ${MAKE_HELPERS_DIRECTORY}march.mk
+
+TF_CFLAGS += $(march-directive)
+
# This internal flag is common option which is set to 1 for scenarios
# when the BL2 is running in EL3 level. This occurs in two scenarios -
# 4 world system running BL2 at EL3 and two world system without BL1 running
diff --git a/drivers/measured_boot/rss/rss_measured_boot.c b/drivers/measured_boot/rss/rss_measured_boot.c
index cf545a7..1b2f177 100644
--- a/drivers/measured_boot/rss/rss_measured_boot.c
+++ b/drivers/measured_boot/rss/rss_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -32,23 +32,10 @@
# error Invalid Measured Boot algorithm.
#endif /* MBOOT_ALG_ID */
-/* Pointer to struct rss_mboot_metadata */
-static struct rss_mboot_metadata *plat_metadata_ptr;
-
/* Functions' declarations */
-void rss_measured_boot_init(void)
+void rss_measured_boot_init(struct rss_mboot_metadata *metadata_ptr)
{
- /* At this point it is expected that communication channel over MHU
- * is already initialised by platform init.
- */
- struct rss_mboot_metadata *metadata_ptr;
-
- /* Get pointer to platform's struct rss_mboot_metadata structure */
- plat_metadata_ptr = plat_rss_mboot_get_metadata();
- assert(plat_metadata_ptr != NULL);
-
- /* Use a local variable to preserve the value of the global pointer */
- metadata_ptr = plat_metadata_ptr;
+ assert(metadata_ptr != NULL);
/* Init the non-const members of the metadata structure */
while (metadata_ptr->id != RSS_MBOOT_INVALID_ID) {
@@ -58,13 +45,15 @@
}
}
-int rss_mboot_measure_and_record(uintptr_t data_base, uint32_t data_size,
+int rss_mboot_measure_and_record(struct rss_mboot_metadata *metadata_ptr,
+ uintptr_t data_base, uint32_t data_size,
uint32_t data_id)
{
unsigned char hash_data[CRYPTO_MD_MAX_SIZE];
int rc;
psa_status_t ret;
- const struct rss_mboot_metadata *metadata_ptr = plat_metadata_ptr;
+
+ assert(metadata_ptr != NULL);
/* Get the metadata associated with this image. */
while ((metadata_ptr->id != RSS_MBOOT_INVALID_ID) &&
@@ -103,14 +92,16 @@
return 0;
}
-int rss_mboot_set_signer_id(unsigned int img_id,
+int rss_mboot_set_signer_id(struct rss_mboot_metadata *metadata_ptr,
+ unsigned int img_id,
const void *pk_ptr,
size_t pk_len)
{
unsigned char hash_data[CRYPTO_MD_MAX_SIZE];
- struct rss_mboot_metadata *metadata_ptr = plat_metadata_ptr;
int rc;
+ assert(metadata_ptr != NULL);
+
/* Get the metadata associated with this image. */
while ((metadata_ptr->id != RSS_MBOOT_INVALID_ID) &&
(metadata_ptr->id != img_id)) {
diff --git a/drivers/st/uart/aarch32/stm32_console.S b/drivers/st/uart/aarch32/stm32_console.S
index d64a6cd..e063941 100644
--- a/drivers/st/uart/aarch32/stm32_console.S
+++ b/drivers/st/uart/aarch32/stm32_console.S
@@ -236,7 +236,7 @@
#endif /* ENABLE_ASSERTIONS */
/* Skip flush if UART is not enabled */
ldr r1, [r0, #USART_CR1]
- ands r1, r1, #USART_CR1_UE
+ tst r1, #USART_CR1_UE
beq 1f
/* Check Transmit Data Register Empty */
txe_loop_3:
diff --git a/fdts/morello-coresight.dtsi b/fdts/morello-coresight.dtsi
new file mode 100644
index 0000000..ed3e9e5
--- /dev/null
+++ b/fdts/morello-coresight.dtsi
@@ -0,0 +1,361 @@
+/*
+ * Copyright (c) 2023, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ /*
+ * Morello TRMs specify the size for these coresight components as 64K.
+ * The actual size is just 4K though 64K is reserved. Access to the
+ * unmapped reserved region results in a DECERR response.
+ */
+ cpu_debug0: cpu-debug@402010000 {
+ compatible = "arm,coresight-cpu-debug", "arm,primecell";
+ cpu = <&cpu0>;
+ reg = <0x4 0x02010000 0x0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ };
+
+ etm0: etm@402040000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ cpu = <&cpu0>;
+ reg = <0x4 0x02040000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ out-ports {
+ port {
+ cluster0_etm0_out_port: endpoint {
+ remote-endpoint = <&cluster0_static_funnel_in_port0>;
+ };
+ };
+ };
+ };
+
+ cpu_debug1: cpu-debug@402110000 {
+ compatible = "arm,coresight-cpu-debug", "arm,primecell";
+ cpu = <&cpu1>;
+ reg = <0x4 0x02110000 0x0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ };
+
+ etm1: etm@402140000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ cpu = <&cpu1>;
+ reg = <0x4 0x02140000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ out-ports {
+ port {
+ cluster0_etm1_out_port: endpoint {
+ remote-endpoint = <&cluster0_static_funnel_in_port1>;
+ };
+ };
+ };
+ };
+
+ cpu_debug2: cpu-debug@403010000 {
+ compatible = "arm,coresight-cpu-debug", "arm,primecell";
+ cpu = <&cpu2>;
+ reg = <0x4 0x03010000 0x0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ };
+
+ etm2: etm@403040000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ cpu = <&cpu2>;
+ reg = <0x4 0x03040000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ out-ports {
+ port {
+ cluster1_etm0_out_port: endpoint {
+ remote-endpoint = <&cluster1_static_funnel_in_port0>;
+ };
+ };
+ };
+ };
+
+ cpu_debug3: cpu-debug@403110000 {
+ compatible = "arm,coresight-cpu-debug", "arm,primecell";
+ cpu = <&cpu3>;
+ reg = <0x4 0x03110000 0x0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ };
+
+ etm3: etm@403140000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ cpu = <&cpu3>;
+ reg = <0x4 0x03140000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ out-ports {
+ port {
+ cluster1_etm1_out_port: endpoint {
+ remote-endpoint = <&cluster1_static_funnel_in_port1>;
+ };
+ };
+ };
+ };
+
+ sfunnel0: funnel@0 { /* cluster0 funnel */
+ compatible = "arm,coresight-static-funnel";
+ out-ports {
+ port {
+ cluster0_static_funnel_out_port: endpoint {
+ remote-endpoint = <&etf0_in_port>;
+ };
+ };
+ };
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ cluster0_static_funnel_in_port0: endpoint {
+ remote-endpoint = <&cluster0_etm0_out_port>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ cluster0_static_funnel_in_port1: endpoint {
+ remote-endpoint = <&cluster0_etm1_out_port>;
+ };
+ };
+ };
+ };
+
+ sfunnel1: funnel@1 { /* cluster1 funnel */
+ compatible = "arm,coresight-static-funnel";
+ out-ports {
+ port {
+ cluster1_static_funnel_out_port: endpoint {
+ remote-endpoint = <&etf1_in_port>;
+ };
+ };
+ };
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ cluster1_static_funnel_in_port0: endpoint {
+ remote-endpoint = <&cluster1_etm0_out_port>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ cluster1_static_funnel_in_port1: endpoint {
+ remote-endpoint = <&cluster1_etm1_out_port>;
+ };
+ };
+ };
+ };
+
+ tpiu@400130000 {
+ compatible = "arm,coresight-tpiu", "arm,primecell";
+ reg = <0x4 0x00130000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ in-ports {
+ port {
+ tpiu_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port0>;
+ };
+ };
+ };
+ };
+
+ main_funnel: funnel@4000a0000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x4 0x000a0000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ out-ports {
+ port {
+ main_funnel_out_port: endpoint {
+ remote-endpoint = <&replicator_in_port>;
+ };
+ };
+ };
+ main_funnel_in_ports: in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ main_funnel_in_port0: endpoint {
+ remote-endpoint = <&cluster_funnel_out_port>;
+ };
+ };
+ port@5 {
+ reg = <5>;
+ main_funnel_in_port5: endpoint {
+ remote-endpoint = <&etf2_out_port>;
+ };
+ };
+ };
+ };
+
+ etr@400120000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x4 0x00120000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ arm,scatter-gather;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "etrbufint";
+ in-ports {
+ port {
+ etr_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port1>;
+ };
+ };
+ };
+ };
+
+ replicator@400110000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x4 0x00110000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ /* replicator output ports */
+ port@0 {
+ reg = <0>;
+ replicator_out_port0: endpoint {
+ remote-endpoint = <&tpiu_in_port>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ replicator_out_port1: endpoint {
+ remote-endpoint = <&etr_in_port>;
+ };
+ };
+ };
+ in-ports {
+ port {
+ replicator_in_port: endpoint {
+ remote-endpoint = <&main_funnel_out_port>;
+ };
+ };
+ };
+ };
+
+ cluster_funnel: funnel@4000b0000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x4 0x000b0000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ out-ports {
+ port {
+ cluster_funnel_out_port: endpoint {
+ remote-endpoint = <&main_funnel_in_port0>;
+ };
+ };
+ };
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ cluster_funnel_in_port0: endpoint {
+ remote-endpoint = <&etf0_out_port>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ cluster_funnel_in_port1: endpoint {
+ remote-endpoint = <&etf1_out_port>;
+ };
+ };
+ };
+ };
+
+ etf0: etf@400410000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x4 0x00410000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ in-ports {
+ port {
+ etf0_in_port: endpoint {
+ remote-endpoint = <&cluster0_static_funnel_out_port>;
+ };
+ };
+ };
+ out-ports {
+ port {
+ etf0_out_port: endpoint {
+ remote-endpoint = <&cluster_funnel_in_port0>;
+ };
+ };
+ };
+ };
+
+ etf1: etf@400420000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x4 0x00420000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ in-ports {
+ port {
+ etf1_in_port: endpoint {
+ remote-endpoint = <&cluster1_static_funnel_out_port>;
+ };
+ };
+ };
+ out-ports {
+ port {
+ etf1_out_port: endpoint {
+ remote-endpoint = <&cluster_funnel_in_port1>;
+ };
+ };
+ };
+ };
+
+ stm_etf: etf@400010000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x4 0x00010000 0 0x1000>;
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ in-ports {
+ port {
+ etf2_in_port: endpoint {
+ remote-endpoint = <&stm_out_port>;
+ };
+ };
+ };
+ out-ports {
+ port {
+ etf2_out_port: endpoint {
+ remote-endpoint = <&main_funnel_in_port5>;
+ };
+ };
+ };
+ };
+
+ stm@400800000 {
+ compatible = "arm,coresight-stm", "arm,primecell";
+ reg = <4 0x00800000 0 0x1000>,
+ <0 0x4d000000 0 0x1000000>;
+ reg-names = "stm-base", "stm-stimulus-base";
+ clocks = <&soc_refclk50mhz>;
+ clock-names = "apb_pclk";
+ out-ports {
+ port {
+ stm_out_port: endpoint {
+ remote-endpoint = <&etf2_in_port>;
+ };
+ };
+ };
+ };
+};
diff --git a/fdts/morello-soc.dts b/fdts/morello-soc.dts
index e87b617..61b5763 100644
--- a/fdts/morello-soc.dts
+++ b/fdts/morello-soc.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "morello.dtsi"
+#include "morello-coresight.dtsi"
/ {
model = "Arm Morello System Development Platform";
@@ -28,28 +29,28 @@
cpus {
#address-cells = <2>;
#size-cells = <0>;
- cpu0@0 {
+ cpu0: cpu0@0 {
compatible = "arm,armv8";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
clocks = <&scmi_dvfs 0>;
};
- cpu1@100 {
+ cpu1: cpu1@100 {
compatible = "arm,armv8";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
clocks = <&scmi_dvfs 0>;
};
- cpu2@10000 {
+ cpu2: cpu2@10000 {
compatible = "arm,armv8";
reg = <0x0 0x10000>;
device_type = "cpu";
enable-method = "psci";
clocks = <&scmi_dvfs 1>;
};
- cpu3@10100 {
+ cpu3: cpu3@10100 {
compatible = "arm,armv8";
reg = <0x0 0x10100>;
device_type = "cpu";
diff --git a/include/drivers/measured_boot/rss/rss_measured_boot.h b/include/drivers/measured_boot/rss/rss_measured_boot.h
index fe88576..76affd8 100644
--- a/include/drivers/measured_boot/rss/rss_measured_boot.h
+++ b/include/drivers/measured_boot/rss/rss_measured_boot.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -44,12 +44,14 @@
};
/* Functions' declarations */
-void rss_measured_boot_init(void);
-struct rss_mboot_metadata *plat_rss_mboot_get_metadata(void);
-int rss_mboot_measure_and_record(uintptr_t data_base, uint32_t data_size,
+void rss_measured_boot_init(struct rss_mboot_metadata *metadata_ptr);
+int rss_mboot_measure_and_record(struct rss_mboot_metadata *metadata_ptr,
+ uintptr_t data_base, uint32_t data_size,
uint32_t data_id);
/* TODO: These metadata are currently not available during TF-A boot */
-int rss_mboot_set_signer_id(unsigned int img_id, const void *pk_ptr, size_t pk_len);
+int rss_mboot_set_signer_id(struct rss_mboot_metadata *metadata_ptr,
+ unsigned int img_id, const void *pk_ptr,
+ size_t pk_len);
#endif /* RSS_MEASURED_BOOT_H */
diff --git a/make_helpers/march.mk b/make_helpers/march.mk
new file mode 100644
index 0000000..2417709
--- /dev/null
+++ b/make_helpers/march.mk
@@ -0,0 +1,85 @@
+#
+# Copyright (c) 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+# This build helper makefile is used to determine a suitable march build
+# option to be used, based on platform provided ARM_ARCH_MAJOR/MINOR
+# data and compiler supported march version.
+
+# Set the compiler's target architecture profile based on
+# ARM_ARCH_MAJOR and ARM_ARCH_MINOR options.
+
+
+# This is used to collect available march values from compiler.
+# Example on a gcc-12.2 arm64 toolchain it will look like:
+# [...]
+#./aarch64-none-elf-gcc --target-help -march=foo
+# cc1: error: unknown value 'foo' for '-march'
+# cc1: note: valid arguments are: armv8-a armv8.1-a armv8.2-a armv8.3-a armv8.4-a armv8.5-a
+# armv8.6-a armv8.7-a armv8.8-a armv8-r armv9-a
+# [...]
+#
+GCC_MARCH_OUTPUT := $(shell $(CC) -march=foo -Q --help=target -v 2>&1)
+
+# This function is used to find the best march value supported by the given compiler.
+# We try to use `GCC_MARCH_OUTPUT` which has verbose message with supported march values we filter that
+# to find armvX.Y-a or armvX-a values, then filter the best supported arch based on ARM_ARCH_MAJOR.
+#
+# Example on a gcc-12.2 arm64 toolchain this will return armv9-a if platform requested for armv9.2-a
+# Similarly on gcc 11.3 it would return armv8.6-a if platform requested armv8.8-a
+define major_best_avail_march
+$(1) := $(lastword $(filter armv$(ARM_ARCH_MAJOR)% ,$(filter armv%-a, $(GCC_MARCH_OUTPUT))))
+endef
+
+# This function is used to just return latest march value supported by the given compiler.
+#
+# Example: this would return armv8.6-a on a gcc-11.3 when platform requested for armv9.0-a
+#
+# Thus this function should be used in conjunction with major_best_avail_march, when best match
+# is not found it should be ok to try with lastest known supported march value from the
+# compiler.
+define latest_match_march
+$(1) := $(lastword $(filter armv%-a, $(GCC_MARCH_OUTPUT)))
+endef
+
+ifdef MARCH_DIRECTIVE
+ march-directive := $(MARCH_DIRECTIVE)
+else
+
+ifeq (${ARM_ARCH_MINOR},0)
+ provided-march = armv${ARM_ARCH_MAJOR}-a
+else
+ provided-march = armv${ARM_ARCH_MAJOR}.${ARM_ARCH_MINOR}-a
+endif
+
+ifeq ($(findstring clang,$(notdir $(CC))),)
+
+# We expect from Platform to provide a correct Major/Minor value but expecting something
+# from compiler with unsupported march means we shouldn't fail without trying anything,
+# so here we try to find best supported march value and use that for compilation.
+# If we don't support current march version from gcc compiler, try with lower arch based on
+# availability. In TF-A there is no hard rule for need of higher version march for basic
+# functionality, denying a build on only this fact doesn't look correct, so try with best
+# or latest march values from whats available from compiler.
+ifeq (,$(findstring $(provided-march), $(GCC_MARCH_OUTPUT)))
+ $(eval $(call major_best_avail_march, available-march))
+
+ifeq (, $(available-march))
+ $(eval $(call latest_match_march, available-march))
+endif
+
+# If we fail to come up with any available-march value so far, don't update
+# provided-march and thus allow the build to fail using the provided-march
+# which is derived based on arch_major and arch_minor values.
+ifneq (,$(available-march))
+ provided-march := ${available-march}
+endif
+
+endif # provided-march supported
+endif # not clang
+
+march-directive := -march=${provided-march}
+
+endif # MARCH_DIRECTIVE
diff --git a/plat/arm/board/fvp/fvp_bl1_measured_boot.c b/plat/arm/board/fvp/fvp_bl1_measured_boot.c
index 72fdfef..b8431c5 100644
--- a/plat/arm/board/fvp/fvp_bl1_measured_boot.c
+++ b/plat/arm/board/fvp/fvp_bl1_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2021-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -54,7 +54,7 @@
event_log_init(event_log, event_log + sizeof(event_log));
event_log_write_header();
- rss_measured_boot_init();
+ rss_measured_boot_init(fvp_rss_mboot_metadata);
}
void bl1_plat_mboot_finish(void)
diff --git a/plat/arm/board/fvp/fvp_bl2_measured_boot.c b/plat/arm/board/fvp/fvp_bl2_measured_boot.c
index e6b9192..564118e 100644
--- a/plat/arm/board/fvp/fvp_bl2_measured_boot.c
+++ b/plat/arm/board/fvp/fvp_bl2_measured_boot.c
@@ -117,7 +117,7 @@
event_log_init((uint8_t *)event_log_start, event_log_finish);
- rss_measured_boot_init();
+ rss_measured_boot_init(fvp_rss_mboot_metadata);
}
int plat_mboot_measure_critical_data(unsigned int critical_data_id,
diff --git a/plat/arm/board/fvp/fvp_common_measured_boot.c b/plat/arm/board/fvp/fvp_common_measured_boot.c
index b5b8f10..7419e5e 100644
--- a/plat/arm/board/fvp/fvp_common_measured_boot.c
+++ b/plat/arm/board/fvp/fvp_common_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2021-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -16,11 +16,6 @@
extern event_log_metadata_t fvp_event_log_metadata[];
extern struct rss_mboot_metadata fvp_rss_mboot_metadata[];
-struct rss_mboot_metadata *plat_rss_mboot_get_metadata(void)
-{
- return fvp_rss_mboot_metadata;
-}
-
int plat_mboot_measure_image(unsigned int image_id, image_info_t *image_data)
{
int err;
@@ -38,7 +33,8 @@
}
/* Calculate image hash and record data in RSS */
- err = rss_mboot_measure_and_record(image_data->image_base,
+ err = rss_mboot_measure_and_record(fvp_rss_mboot_metadata,
+ image_data->image_base,
image_data->image_size,
image_id);
if (err != 0) {
diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h
index b3799a7..74d0c91 100644
--- a/plat/arm/board/n1sdp/include/platform_def.h
+++ b/plat/arm/board/n1sdp/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -190,11 +190,47 @@
#define PLAT_CSS_MHU_BASE 0x45000000
#define PLAT_MAX_PWR_LVL 2
-#define PLAT_ARM_G1S_IRQS ARM_G1S_IRQS, \
- CSS_IRQ_MHU
-#define PLAT_ARM_G0_IRQS ARM_G0_IRQS
+/* Interrupt handling constants */
+#define N1SDP_IRQ_MMU_TCU1_EVENT_Q_SEC U(257)
+#define N1SDP_IRQ_MMU_TCU1_CMD_SYNC_SEC U(258)
+#define N1SDP_IRQ_MMU_TCU1_GLOBAL U(259)
+#define N1SDP_IRQ_MMU_TCU2_EVENT_Q_SEC U(264)
+#define N1SDP_IRQ_MMU_TCU2_CMD_SYNC_SEC U(265)
+#define N1SDP_IRQ_MMU_TCU2_GLOBAL U(266)
+#define N1SDP_IRQ_CLUSTER0_MHU U(349)
+#define N1SDP_IRQ_CLUSTER1_MHU U(351)
+#define N1SDP_IRQ_P0_REFCLK U(412)
+#define N1SDP_IRQ_P1_REFCLK U(413)
+
+#define PLAT_ARM_G1S_IRQ_PROPS(grp) \
+ ARM_G1S_IRQ_PROPS(grp), \
+ INTR_PROP_DESC(CSS_IRQ_MHU, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(CSS_IRQ_TZ_WDOG, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(CSS_IRQ_SEC_SYS_TIMER, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_MMU_TCU1_EVENT_Q_SEC, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_MMU_TCU1_CMD_SYNC_SEC, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_MMU_TCU1_GLOBAL, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_MMU_TCU2_EVENT_Q_SEC, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_MMU_TCU2_CMD_SYNC_SEC, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_MMU_TCU2_GLOBAL, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_CLUSTER0_MHU, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_CLUSTER1_MHU, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_P0_REFCLK, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL), \
+ INTR_PROP_DESC(N1SDP_IRQ_P1_REFCLK, \
+ GIC_HIGHEST_SEC_PRIORITY, grp, GIC_INTR_CFG_LEVEL)
-#define PLAT_ARM_G1S_IRQ_PROPS(grp) CSS_G1S_IRQ_PROPS(grp)
#define PLAT_ARM_G0_IRQ_PROPS(grp) ARM_G0_IRQ_PROPS(grp)
diff --git a/plat/arm/board/tc/tc_bl1_measured_boot.c b/plat/arm/board/tc/tc_bl1_measured_boot.c
index 0d29c51..6d4bb07 100644
--- a/plat/arm/board/tc/tc_bl1_measured_boot.c
+++ b/plat/arm/board/tc/tc_bl1_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -46,7 +46,7 @@
(void)rss_comms_init(PLAT_RSS_AP_SND_MHU_BASE,
PLAT_RSS_AP_RCV_MHU_BASE);
- rss_measured_boot_init();
+ rss_measured_boot_init(tc_rss_mboot_metadata);
}
void bl1_plat_mboot_finish(void)
diff --git a/plat/arm/board/tc/tc_bl2_measured_boot.c b/plat/arm/board/tc/tc_bl2_measured_boot.c
index 7ea2c2e..9039853 100644
--- a/plat/arm/board/tc/tc_bl2_measured_boot.c
+++ b/plat/arm/board/tc/tc_bl2_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -45,7 +45,7 @@
(void)rss_comms_init(PLAT_RSS_AP_SND_MHU_BASE,
PLAT_RSS_AP_RCV_MHU_BASE);
- rss_measured_boot_init();
+ rss_measured_boot_init(tc_rss_mboot_metadata);
}
void bl2_plat_mboot_finish(void)
diff --git a/plat/arm/board/tc/tc_common_measured_boot.c b/plat/arm/board/tc/tc_common_measured_boot.c
index fe71899..eddcc81 100644
--- a/plat/arm/board/tc/tc_common_measured_boot.c
+++ b/plat/arm/board/tc/tc_common_measured_boot.c
@@ -1,6 +1,5 @@
-
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,17 +12,13 @@
extern struct rss_mboot_metadata tc_rss_mboot_metadata[];
-struct rss_mboot_metadata *plat_rss_mboot_get_metadata(void)
-{
- return tc_rss_mboot_metadata;
-}
-
int plat_mboot_measure_image(unsigned int image_id, image_info_t *image_data)
{
int err;
/* Calculate image hash and record data in RSS */
- err = rss_mboot_measure_and_record(image_data->image_base,
+ err = rss_mboot_measure_and_record(tc_rss_mboot_metadata,
+ image_data->image_base,
image_data->image_size,
image_id);
if (err != 0) {
diff --git a/plat/intel/soc/common/drivers/ccu/ncore_ccu.c b/plat/intel/soc/common/drivers/ccu/ncore_ccu.c
index 38f8b94..0148b75 100644
--- a/plat/intel/soc/common/drivers/ccu/ncore_ccu.c
+++ b/plat/intel/soc/common/drivers/ccu/ncore_ccu.c
@@ -72,12 +72,12 @@
/* Coh Agent Snoop Enable */
if (CACHING_AGENT_BIT(ca_id))
- mmio_write_32(ca_snoop_en, BIT(ca));
+ mmio_setbits_32(ca_snoop_en, BIT(ca));
/* Coh Agent Snoop DVM Enable */
ca_type = CACHING_AGENT_TYPE(ca_id);
if (ca_type == ACE_W_DVM || ca_type == ACE_L_W_DVM)
- mmio_write_32(NCORE_CCU_CSR(NCORE_CSADSER0),
+ mmio_setbits_32(NCORE_CCU_CSR(NCORE_CSADSER0),
BIT(ca));
}
}
diff --git a/plat/mediatek/drivers/gic600/mt_gic_v3.c b/plat/mediatek/drivers/gic600/mt_gic_v3.c
index cca5d0a..85f9e37 100644
--- a/plat/mediatek/drivers/gic600/mt_gic_v3.c
+++ b/plat/mediatek/drivers/gic600/mt_gic_v3.c
@@ -42,13 +42,19 @@
struct gic_chip_data {
/* All cores share the same configuration */
+ unsigned int saved_ctlr;
unsigned int saved_group;
unsigned int saved_enable;
unsigned int saved_conf0;
unsigned int saved_conf1;
unsigned int saved_grpmod;
+ unsigned int saved_ispendr;
+ unsigned int saved_isactiver;
+ unsigned int saved_nsacr;
/* Per-core sgi */
unsigned int saved_sgi[PLATFORM_CORE_COUNT];
+ /* Per-core priority */
+ unsigned int saved_prio[PLATFORM_CORE_COUNT][GICR_NUM_REGS(IPRIORITYR)];
};
static struct gic_chip_data gic_data;
@@ -94,53 +100,84 @@
void mt_gic_rdistif_save(void)
{
- unsigned int proc_num;
+ unsigned int i, proc_num;
uintptr_t gicr_base;
proc_num = plat_my_core_pos();
gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
+ /*
+ * Wait for any write to GICR_CTLR to complete before trying to save any
+ * state.
+ */
+ gicr_wait_for_pending_write(gicr_base);
+
+ gic_data.saved_ctlr = mmio_read_32(gicr_base + GICR_CTLR);
gic_data.saved_group = mmio_read_32(gicr_base + GICR_IGROUPR0);
gic_data.saved_enable = mmio_read_32(gicr_base + GICR_ISENABLER0);
gic_data.saved_conf0 = mmio_read_32(gicr_base + GICR_ICFGR0);
gic_data.saved_conf1 = mmio_read_32(gicr_base + GICR_ICFGR1);
gic_data.saved_grpmod = mmio_read_32(gicr_base + GICR_IGRPMODR0);
+ gic_data.saved_ispendr = mmio_read_32(gicr_base + GICR_ISPENDR0);
+ gic_data.saved_isactiver = mmio_read_32(gicr_base + GICR_ISACTIVER0);
+ gic_data.saved_nsacr = mmio_read_32(gicr_base + GICR_NSACR);
+
+ for (i = 0U; i < 8U; ++i)
+ gic_data.saved_prio[proc_num][i] = gicr_ipriorityr_read(gicr_base, i);
rdist_has_saved[proc_num] = 1;
}
void mt_gic_rdistif_restore(void)
{
- unsigned int proc_num;
+ unsigned int i, proc_num;
uintptr_t gicr_base;
proc_num = plat_my_core_pos();
if (rdist_has_saved[proc_num] == 1) {
gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
+
mmio_write_32(gicr_base + GICR_IGROUPR0, gic_data.saved_group);
- mmio_write_32(gicr_base + GICR_ISENABLER0,
- gic_data.saved_enable);
+ mmio_write_32(gicr_base + GICR_IGRPMODR0, gic_data.saved_grpmod);
+ mmio_write_32(gicr_base + GICR_NSACR, gic_data.saved_nsacr);
mmio_write_32(gicr_base + GICR_ICFGR0, gic_data.saved_conf0);
mmio_write_32(gicr_base + GICR_ICFGR1, gic_data.saved_conf1);
- mmio_write_32(gicr_base + GICR_IGRPMODR0,
- gic_data.saved_grpmod);
+
+ for (i = 0U; i < 8U; ++i)
+ gicr_ipriorityr_write(gicr_base, i, gic_data.saved_prio[proc_num][i]);
+
+ mmio_write_32(gicr_base + GICR_ISPENDR0, gic_data.saved_ispendr);
+ mmio_write_32(gicr_base + GICR_ISACTIVER0, gic_data.saved_isactiver);
+ mmio_write_32(gicr_base + GICR_ISENABLER0, gic_data.saved_enable);
+ mmio_write_32(gicr_base + GICR_CTLR, gic_data.saved_ctlr);
+
+ gicr_wait_for_pending_write(gicr_base);
}
}
void mt_gic_rdistif_restore_all(void)
{
- unsigned int proc_num;
+ unsigned int i, proc_num;
uintptr_t gicr_base;
for (proc_num = 0; proc_num < PLATFORM_CORE_COUNT; proc_num++) {
gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
+
mmio_write_32(gicr_base + GICR_IGROUPR0, gic_data.saved_group);
- mmio_write_32(gicr_base + GICR_ISENABLER0,
- gic_data.saved_enable);
+ mmio_write_32(gicr_base + GICR_IGRPMODR0, gic_data.saved_grpmod);
+ mmio_write_32(gicr_base + GICR_NSACR, gic_data.saved_nsacr);
mmio_write_32(gicr_base + GICR_ICFGR0, gic_data.saved_conf0);
mmio_write_32(gicr_base + GICR_ICFGR1, gic_data.saved_conf1);
- mmio_write_32(gicr_base + GICR_IGRPMODR0,
- gic_data.saved_grpmod);
+
+ for (i = 0U; i < 8U; ++i)
+ gicr_ipriorityr_write(gicr_base, i, gic_data.saved_prio[proc_num][i]);
+
+ mmio_write_32(gicr_base + GICR_ISPENDR0, gic_data.saved_ispendr);
+ mmio_write_32(gicr_base + GICR_ISACTIVER0, gic_data.saved_isactiver);
+ mmio_write_32(gicr_base + GICR_ISENABLER0, gic_data.saved_enable);
+ mmio_write_32(gicr_base + GICR_CTLR, gic_data.saved_ctlr);
+
+ gicr_wait_for_pending_write(gicr_base);
}
}
diff --git a/plat/qemu/qemu/platform.mk b/plat/qemu/qemu/platform.mk
index 56c96a1..a10ab65 100644
--- a/plat/qemu/qemu/platform.mk
+++ b/plat/qemu/qemu/platform.mk
@@ -65,6 +65,7 @@
lib/cpus/aarch64/cortex_a76.S \
lib/cpus/aarch64/neoverse_n_common.S \
lib/cpus/aarch64/neoverse_n1.S \
+ lib/cpus/aarch64/neoverse_v1.S \
lib/cpus/aarch64/qemu_max.S
else
QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S
diff --git a/plat/qemu/qemu_sbsa/platform.mk b/plat/qemu/qemu_sbsa/platform.mk
index 60d6b7e..3dfefd0 100644
--- a/plat/qemu/qemu_sbsa/platform.mk
+++ b/plat/qemu/qemu_sbsa/platform.mk
@@ -51,6 +51,7 @@
lib/cpus/aarch64/cortex_a72.S \
lib/cpus/aarch64/neoverse_n_common.S \
lib/cpus/aarch64/neoverse_n1.S \
+ lib/cpus/aarch64/neoverse_v1.S \
lib/cpus/aarch64/qemu_max.S
include lib/xlat_tables_v2/xlat_tables.mk
diff --git a/plat/xilinx/common/include/plat_startup.h b/plat/xilinx/common/include/plat_startup.h
index d1c5303..5270e13 100644
--- a/plat/xilinx/common/include/plat_startup.h
+++ b/plat/xilinx/common/include/plat_startup.h
@@ -10,34 +10,34 @@
#include <common/bl_common.h>
-/* For FSBL handover */
-enum fsbl_handoff {
- FSBL_HANDOFF_SUCCESS = 0,
- FSBL_HANDOFF_NO_STRUCT,
- FSBL_HANDOFF_INVAL_STRUCT,
- FSBL_HANDOFF_TOO_MANY_PARTS
+/* For Xilinx bootloader XBL handover */
+enum xbl_handoff {
+ XBL_HANDOFF_SUCCESS = 0,
+ XBL_HANDOFF_NO_STRUCT,
+ XBL_HANDOFF_INVAL_STRUCT,
+ XBL_HANDOFF_TOO_MANY_PARTS
};
-#define FSBL_MAX_PARTITIONS 8U
+#define XBL_MAX_PARTITIONS 8U
/* Structure corresponding to each partition entry */
-struct xfsbl_partition {
+struct xbl_partition {
uint64_t entry_point;
uint64_t flags;
};
/* Structure for handoff parameters to TrustedFirmware-A (TF-A) */
-struct xfsbl_tfa_handoff_params {
+struct xbl_handoff_params {
uint8_t magic[4];
uint32_t num_entries;
- struct xfsbl_partition partition[FSBL_MAX_PARTITIONS];
+ struct xbl_partition partition[XBL_MAX_PARTITIONS];
};
-#define TFA_HANDOFF_PARAMS_MAX_SIZE sizeof(struct xfsbl_tfa_handoff_params)
+#define HANDOFF_PARAMS_MAX_SIZE sizeof(struct xbl_handoff_params)
-enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
+enum xbl_handoff xbl_handover(entry_point_info_t *bl32,
entry_point_info_t *bl33,
- uint64_t tfa_handoff_addr);
+ uint64_t handoff_addr);
/* JEDEC Standard Manufacturer's Identification Code and Bank ID JEP106 */
#define JEDEC_XILINX_MFID U(0x49)
diff --git a/plat/xilinx/common/include/pm_ipi.h b/plat/xilinx/common/include/pm_ipi.h
index 27fab7f..976abd6 100644
--- a/plat/xilinx/common/include/pm_ipi.h
+++ b/plat/xilinx/common/include/pm_ipi.h
@@ -9,8 +9,9 @@
#ifndef PM_IPI_H
#define PM_IPI_H
-#include <plat_ipi.h>
#include <stddef.h>
+
+#include <plat_ipi.h>
#include "pm_common.h"
#define IPI_BLOCKING 1
diff --git a/plat/xilinx/common/include/pm_node.h b/plat/xilinx/common/include/pm_node.h
index b6c2d81..46f6bcf 100644
--- a/plat/xilinx/common/include/pm_node.h
+++ b/plat/xilinx/common/include/pm_node.h
@@ -188,54 +188,54 @@
XPM_NODEIDX_DEV_GT_10 = 0x53,
#if defined(PLAT_versal_net)
- XPM_NODEIDX_DEV_ACPU_0_0 = 0x54,
- XPM_NODEIDX_DEV_ACPU_0_1 = 0x55,
- XPM_NODEIDX_DEV_ACPU_0_2 = 0x56,
- XPM_NODEIDX_DEV_ACPU_0_3 = 0x57,
- XPM_NODEIDX_DEV_ACPU_1_0 = 0x58,
- XPM_NODEIDX_DEV_ACPU_1_1 = 0x59,
- XPM_NODEIDX_DEV_ACPU_1_2 = 0x5A,
- XPM_NODEIDX_DEV_ACPU_1_3 = 0x5B,
- XPM_NODEIDX_DEV_ACPU_2_0 = 0x5C,
- XPM_NODEIDX_DEV_ACPU_2_1 = 0x5D,
- XPM_NODEIDX_DEV_ACPU_2_2 = 0x5E,
- XPM_NODEIDX_DEV_ACPU_2_3 = 0x5F,
- XPM_NODEIDX_DEV_ACPU_3_0 = 0x60,
- XPM_NODEIDX_DEV_ACPU_3_1 = 0x61,
- XPM_NODEIDX_DEV_ACPU_3_2 = 0x62,
- XPM_NODEIDX_DEV_ACPU_3_3 = 0x63,
- XPM_NODEIDX_DEV_RPU_A_0 = 0x64,
- XPM_NODEIDX_DEV_RPU_A_1 = 0x65,
- XPM_NODEIDX_DEV_RPU_B_0 = 0x66,
- XPM_NODEIDX_DEV_RPU_B_1 = 0x67,
- XPM_NODEIDX_DEV_OCM_0_0 = 0x68,
- XPM_NODEIDX_DEV_OCM_0_1 = 0x69,
- XPM_NODEIDX_DEV_OCM_0_2 = 0x6A,
- XPM_NODEIDX_DEV_OCM_0_3 = 0x6B,
- XPM_NODEIDX_DEV_OCM_1_0 = 0x6C,
- XPM_NODEIDX_DEV_OCM_1_1 = 0x6D,
- XPM_NODEIDX_DEV_OCM_1_2 = 0x6E,
- XPM_NODEIDX_DEV_OCM_1_3 = 0x6F,
- XPM_NODEIDX_DEV_TCM_A_0A = 0x70,
- XPM_NODEIDX_DEV_TCM_A_0B = 0x71,
- XPM_NODEIDX_DEV_TCM_A_0C = 0x72,
- XPM_NODEIDX_DEV_TCM_A_1A = 0x73,
- XPM_NODEIDX_DEV_TCM_A_1B = 0x74,
- XPM_NODEIDX_DEV_TCM_A_1C = 0x75,
- XPM_NODEIDX_DEV_TCM_B_0A = 0x76,
- XPM_NODEIDX_DEV_TCM_B_0B = 0x77,
- XPM_NODEIDX_DEV_TCM_B_0C = 0x78,
- XPM_NODEIDX_DEV_TCM_B_1A = 0x79,
- XPM_NODEIDX_DEV_TCM_B_1B = 0x7A,
- XPM_NODEIDX_DEV_TCM_B_1C = 0x7B,
- XPM_NODEIDX_DEV_USB_1 = 0x7C,
- XPM_NODEIDX_DEV_PMC_WWDT = 0x7D,
- XPM_NODEIDX_DEV_LPD_SWDT_0 = 0x7E,
- XPM_NODEIDX_DEV_LPD_SWDT_1 = 0x7F,
- XPM_NODEIDX_DEV_FPD_SWDT_0 = 0x80,
- XPM_NODEIDX_DEV_FPD_SWDT_1 = 0x81,
- XPM_NODEIDX_DEV_FPD_SWDT_2 = 0x82,
- XPM_NODEIDX_DEV_FPD_SWDT_3 = 0x83,
+ XPM_NODEIDX_DEV_ACPU_0_0 = 0xAF,
+ XPM_NODEIDX_DEV_ACPU_0_1 = 0xB0,
+ XPM_NODEIDX_DEV_ACPU_0_2 = 0xB1,
+ XPM_NODEIDX_DEV_ACPU_0_3 = 0xB2,
+ XPM_NODEIDX_DEV_ACPU_1_0 = 0xB3,
+ XPM_NODEIDX_DEV_ACPU_1_1 = 0xB4,
+ XPM_NODEIDX_DEV_ACPU_1_2 = 0xB5,
+ XPM_NODEIDX_DEV_ACPU_1_3 = 0xB6,
+ XPM_NODEIDX_DEV_ACPU_2_0 = 0xB7,
+ XPM_NODEIDX_DEV_ACPU_2_1 = 0xB8,
+ XPM_NODEIDX_DEV_ACPU_2_2 = 0xB9,
+ XPM_NODEIDX_DEV_ACPU_2_3 = 0xBA,
+ XPM_NODEIDX_DEV_ACPU_3_0 = 0xBB,
+ XPM_NODEIDX_DEV_ACPU_3_1 = 0xBC,
+ XPM_NODEIDX_DEV_ACPU_3_2 = 0xBD,
+ XPM_NODEIDX_DEV_ACPU_3_3 = 0xBE,
+ XPM_NODEIDX_DEV_RPU_A_0 = 0xBF,
+ XPM_NODEIDX_DEV_RPU_A_1 = 0xC0,
+ XPM_NODEIDX_DEV_RPU_B_0 = 0xC1,
+ XPM_NODEIDX_DEV_RPU_B_1 = 0xC2,
+ XPM_NODEIDX_DEV_OCM_0_0 = 0xC3,
+ XPM_NODEIDX_DEV_OCM_0_1 = 0xC4,
+ XPM_NODEIDX_DEV_OCM_0_2 = 0xC5,
+ XPM_NODEIDX_DEV_OCM_0_3 = 0xC6,
+ XPM_NODEIDX_DEV_OCM_1_0 = 0xC7,
+ XPM_NODEIDX_DEV_OCM_1_1 = 0xC8,
+ XPM_NODEIDX_DEV_OCM_1_2 = 0xC9,
+ XPM_NODEIDX_DEV_OCM_1_3 = 0xCA,
+ XPM_NODEIDX_DEV_TCM_A_0A = 0xCB,
+ XPM_NODEIDX_DEV_TCM_A_0B = 0xCC,
+ XPM_NODEIDX_DEV_TCM_A_0C = 0xCD,
+ XPM_NODEIDX_DEV_TCM_A_1A = 0xCE,
+ XPM_NODEIDX_DEV_TCM_A_1B = 0xCF,
+ XPM_NODEIDX_DEV_TCM_A_1C = 0xD0,
+ XPM_NODEIDX_DEV_TCM_B_0A = 0xD1,
+ XPM_NODEIDX_DEV_TCM_B_0B = 0xD2,
+ XPM_NODEIDX_DEV_TCM_B_0C = 0xD3,
+ XPM_NODEIDX_DEV_TCM_B_1A = 0xD4,
+ XPM_NODEIDX_DEV_TCM_B_1B = 0xD5,
+ XPM_NODEIDX_DEV_TCM_B_1C = 0xD6,
+ XPM_NODEIDX_DEV_USB_1 = 0xD7,
+ XPM_NODEIDX_DEV_PMC_WWDT = 0xD8,
+ XPM_NODEIDX_DEV_LPD_SWDT_0 = 0xD9,
+ XPM_NODEIDX_DEV_LPD_SWDT_1 = 0xDA,
+ XPM_NODEIDX_DEV_FPD_SWDT_0 = 0xDB,
+ XPM_NODEIDX_DEV_FPD_SWDT_1 = 0xDC,
+ XPM_NODEIDX_DEV_FPD_SWDT_2 = 0xDD,
+ XPM_NODEIDX_DEV_FPD_SWDT_3 = 0xDE,
#endif
XPM_NODEIDX_DEV_MAX,
};
diff --git a/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c b/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c
index 6c060d5..434cd88 100644
--- a/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c
+++ b/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c
@@ -18,11 +18,10 @@
#include <lib/mmio.h>
#include <ipi.h>
+#include "ipi_mailbox_svc.h"
#include <plat_ipi.h>
#include <plat_private.h>
-#include "ipi_mailbox_svc.h"
-
/*********************************************************************
* Macros definitions
********************************************************************/
diff --git a/plat/xilinx/common/plat_startup.c b/plat/xilinx/common/plat_startup.c
index d034e00..f45c9f0 100644
--- a/plat/xilinx/common/plat_startup.c
+++ b/plat/xilinx/common/plat_startup.c
@@ -15,7 +15,7 @@
/*
- * TFAHandoffParams
+ * HandoffParams
* Parameter bitfield encoding
* -----------------------------------------------------------------------------
* Exec State 0 0 -> Aarch64, 1-> Aarch32
@@ -23,94 +23,104 @@
* secure (TZ) 2 0 -> Non secure, 1 -> secure
* EL 3:4 00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3
* CPU# 5:6 00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3
+ * Reserved 7:10 Reserved
+ * Cluster# 11:12 00 -> Cluster 0, 01 -> Cluster 1, 10 -> Cluster 2,
+ * 11 -> Cluster (Applicable for Versal NET only).
+ * Reserved 13:16 Reserved
*/
-#define FSBL_FLAGS_ESTATE_SHIFT 0U
-#define FSBL_FLAGS_ESTATE_MASK (1U << FSBL_FLAGS_ESTATE_SHIFT)
-#define FSBL_FLAGS_ESTATE_A64 0U
-#define FSBL_FLAGS_ESTATE_A32 1U
+#define XBL_FLAGS_ESTATE_SHIFT 0U
+#define XBL_FLAGS_ESTATE_MASK (1U << XBL_FLAGS_ESTATE_SHIFT)
+#define XBL_FLAGS_ESTATE_A64 0U
+#define XBL_FLAGS_ESTATE_A32 1U
-#define FSBL_FLAGS_ENDIAN_SHIFT 1U
-#define FSBL_FLAGS_ENDIAN_MASK (1U << FSBL_FLAGS_ENDIAN_SHIFT)
-#define FSBL_FLAGS_ENDIAN_LE 0U
-#define FSBL_FLAGS_ENDIAN_BE 1U
+#define XBL_FLAGS_ENDIAN_SHIFT 1U
+#define XBL_FLAGS_ENDIAN_MASK (1U << XBL_FLAGS_ENDIAN_SHIFT)
+#define XBL_FLAGS_ENDIAN_LE 0U
+#define XBL_FLAGS_ENDIAN_BE 1U
-#define FSBL_FLAGS_TZ_SHIFT 2U
-#define FSBL_FLAGS_TZ_MASK (1U << FSBL_FLAGS_TZ_SHIFT)
-#define FSBL_FLAGS_NON_SECURE 0U
-#define FSBL_FLAGS_SECURE 1U
+#define XBL_FLAGS_TZ_SHIFT 2U
+#define XBL_FLAGS_TZ_MASK (1U << XBL_FLAGS_TZ_SHIFT)
+#define XBL_FLAGS_NON_SECURE 0U
+#define XBL_FLAGS_SECURE 1U
-#define FSBL_FLAGS_EL_SHIFT 3U
-#define FSBL_FLAGS_EL_MASK (3U << FSBL_FLAGS_EL_SHIFT)
-#define FSBL_FLAGS_EL0 0U
-#define FSBL_FLAGS_EL1 1U
-#define FSBL_FLAGS_EL2 2U
-#define FSBL_FLAGS_EL3 3U
+#define XBL_FLAGS_EL_SHIFT 3U
+#define XBL_FLAGS_EL_MASK (3U << XBL_FLAGS_EL_SHIFT)
+#define XBL_FLAGS_EL0 0U
+#define XBL_FLAGS_EL1 1U
+#define XBL_FLAGS_EL2 2U
+#define XBL_FLAGS_EL3 3U
-#define FSBL_FLAGS_CPU_SHIFT 5U
-#define FSBL_FLAGS_CPU_MASK (3U << FSBL_FLAGS_CPU_SHIFT)
-#define FSBL_FLAGS_A53_0 0U
-#define FSBL_FLAGS_A53_1 1U
-#define FSBL_FLAGS_A53_2 2U
-#define FSBL_FLAGS_A53_3 3U
+#define XBL_FLAGS_CPU_SHIFT 5U
+#define XBL_FLAGS_CPU_MASK (3U << XBL_FLAGS_CPU_SHIFT)
+#define XBL_FLAGS_A53_0 0U
+#define XBL_FLAGS_A53_1 1U
+#define XBL_FLAGS_A53_2 2U
+#define XBL_FLAGS_A53_3 3U
+
+#if defined(PLAT_versal_net)
+#define XBL_FLAGS_CLUSTER_SHIFT 11U
+#define XBL_FLAGS_CLUSTER_MASK GENMASK(11, 12)
+
+#define XBL_FLAGS_CLUSTER_0 0U
+#endif /* PLAT_versal_net */
/**
- * get_fsbl_cpu() - Get the target CPU for partition.
+ * get_xbl_cpu() - Get the target CPU for partition.
* @partition: Pointer to partition struct.
*
- * Return: FSBL_FLAGS_A53_0, FSBL_FLAGS_A53_1, FSBL_FLAGS_A53_2 or
- * FSBL_FLAGS_A53_3.
+ * Return: XBL_FLAGS_A53_0, XBL_FLAGS_A53_1, XBL_FLAGS_A53_2 or XBL_FLAGS_A53_3.
*
*/
-static int32_t get_fsbl_cpu(const struct xfsbl_partition *partition)
+static int32_t get_xbl_cpu(const struct xbl_partition *partition)
{
- uint64_t flags = partition->flags & FSBL_FLAGS_CPU_MASK;
+ uint64_t flags = partition->flags & XBL_FLAGS_CPU_MASK;
- return flags >> FSBL_FLAGS_CPU_SHIFT;
+ return flags >> XBL_FLAGS_CPU_SHIFT;
}
/**
- * get_fsbl_el() - Get the target exception level for partition.
+ * get_xbl_el() - Get the target exception level for partition.
* @partition: Pointer to partition struct.
*
- * Return: FSBL_FLAGS_EL0, FSBL_FLAGS_EL1, FSBL_FLAGS_EL2 or FSBL_FLAGS_EL3.
+ * Return: XBL_FLAGS_EL0, XBL_FLAGS_EL1, XBL_FLAGS_EL2 or XBL_FLAGS_EL3.
*
*/
-static int32_t get_fsbl_el(const struct xfsbl_partition *partition)
+static int32_t get_xbl_el(const struct xbl_partition *partition)
{
- uint64_t flags = partition->flags & FSBL_FLAGS_EL_MASK;
+ uint64_t flags = partition->flags & XBL_FLAGS_EL_MASK;
- return flags >> FSBL_FLAGS_EL_SHIFT;
+ return flags >> XBL_FLAGS_EL_SHIFT;
}
/**
- * get_fsbl_ss() - Get the target security state for partition.
+ * get_xbl_ss() - Get the target security state for partition.
* @partition: Pointer to partition struct.
*
- * Return: FSBL_FLAGS_NON_SECURE or FSBL_FLAGS_SECURE.
+ * Return: XBL_FLAGS_NON_SECURE or XBL_FLAGS_SECURE.
*
*/
-static int32_t get_fsbl_ss(const struct xfsbl_partition *partition)
+static int32_t get_xbl_ss(const struct xbl_partition *partition)
{
- uint64_t flags = partition->flags & FSBL_FLAGS_TZ_MASK;
+ uint64_t flags = partition->flags & XBL_FLAGS_TZ_MASK;
- return flags >> FSBL_FLAGS_TZ_SHIFT;
+ return flags >> XBL_FLAGS_TZ_SHIFT;
}
/**
- * get_fsbl_endian() - Get the target endianness for partition.
+ * get_xbl_endian() - Get the target endianness for partition.
* @partition: Pointer to partition struct.
*
* Return: SPSR_E_LITTLE or SPSR_E_BIG.
*
*/
-static int32_t get_fsbl_endian(const struct xfsbl_partition *partition)
+static int32_t get_xbl_endian(const struct xbl_partition *partition)
{
- uint64_t flags = partition->flags & FSBL_FLAGS_ENDIAN_MASK;
+ uint64_t flags = partition->flags & XBL_FLAGS_ENDIAN_MASK;
- flags >>= FSBL_FLAGS_ENDIAN_SHIFT;
+ flags >>= XBL_FLAGS_ENDIAN_SHIFT;
- if (flags == FSBL_FLAGS_ENDIAN_BE) {
+ if (flags == XBL_FLAGS_ENDIAN_BE) {
return SPSR_E_BIG;
} else {
return SPSR_E_LITTLE;
@@ -118,58 +128,73 @@
}
/**
- * get_fsbl_estate() - Get the target execution state for partition.
+ * get_xbl_estate() - Get the target execution state for partition.
* @partition: Pointer to partition struct.
*
- * Return: FSBL_FLAGS_ESTATE_A32 or FSBL_FLAGS_ESTATE_A64.
+ * Return: XBL_FLAGS_ESTATE_A32 or XBL_FLAGS_ESTATE_A64.
+ *
+ */
+static int32_t get_xbl_estate(const struct xbl_partition *partition)
+{
+ uint64_t flags = partition->flags & XBL_FLAGS_ESTATE_MASK;
+
+ return flags >> XBL_FLAGS_ESTATE_SHIFT;
+}
+
+#if defined(PLAT_versal_net)
+/**
+ * get_xbl_cluster - Get the cluster number
+ * @partition: pointer to the partition structure.
*
+ * Return: cluster number for the partition.
*/
-static int32_t get_fsbl_estate(const struct xfsbl_partition *partition)
+static int32_t get_xbl_cluster(const struct xbl_partition *partition)
{
- uint64_t flags = partition->flags & FSBL_FLAGS_ESTATE_MASK;
+ uint64_t flags = partition->flags & XBL_FLAGS_CLUSTER_MASK;
- return flags >> FSBL_FLAGS_ESTATE_SHIFT;
+ return (int32_t)(flags >> XBL_FLAGS_CLUSTER_SHIFT);
}
+#endif /* PLAT_versal_net */
/**
- * fsbl_tfa_handover() - Populates the bl32 and bl33 image info structures.
+ * xbl_tfa_handover() - Populates the bl32 and bl33 image info structures.
* @bl32: BL32 image info structure.
* @bl33: BL33 image info structure.
* @tfa_handoff_addr: TF-A handoff address.
*
- * Process the handoff parameters from the FSBL and populate the BL32 and BL33
+ * Process the handoff parameters from the XBL and populate the BL32 and BL33
* image info structures accordingly.
*
* Return: Return the status of the handoff. The value will be from the
- * fsbl_handoff enum.
+ * xbl_handoff enum.
*
*/
-enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
+enum xbl_handoff xbl_handover(entry_point_info_t *bl32,
entry_point_info_t *bl33,
- uint64_t tfa_handoff_addr)
+ uint64_t handoff_addr)
{
- const struct xfsbl_tfa_handoff_params *TFAHandoffParams;
- if (!tfa_handoff_addr) {
- WARN("BL31: No TFA handoff structure passed\n");
- return FSBL_HANDOFF_NO_STRUCT;
+ const struct xbl_handoff_params *HandoffParams;
+
+ if (!handoff_addr) {
+ WARN("BL31: No handoff structure passed\n");
+ return XBL_HANDOFF_NO_STRUCT;
}
- TFAHandoffParams = (struct xfsbl_tfa_handoff_params *)tfa_handoff_addr;
- if ((TFAHandoffParams->magic[0] != 'X') ||
- (TFAHandoffParams->magic[1] != 'L') ||
- (TFAHandoffParams->magic[2] != 'N') ||
- (TFAHandoffParams->magic[3] != 'X')) {
- ERROR("BL31: invalid TF-A handoff structure at %" PRIx64 "\n",
- tfa_handoff_addr);
- return FSBL_HANDOFF_INVAL_STRUCT;
+ HandoffParams = (struct xbl_handoff_params *)handoff_addr;
+ if ((HandoffParams->magic[0] != 'X') ||
+ (HandoffParams->magic[1] != 'L') ||
+ (HandoffParams->magic[2] != 'N') ||
+ (HandoffParams->magic[3] != 'X')) {
+ ERROR("BL31: invalid handoff structure at %" PRIx64 "\n", handoff_addr);
+ return XBL_HANDOFF_INVAL_STRUCT;
}
VERBOSE("BL31: TF-A handoff params at:0x%" PRIx64 ", entries:%u\n",
- tfa_handoff_addr, TFAHandoffParams->num_entries);
- if (TFAHandoffParams->num_entries > FSBL_MAX_PARTITIONS) {
+ handoff_addr, HandoffParams->num_entries);
+ if (HandoffParams->num_entries > XBL_MAX_PARTITIONS) {
ERROR("BL31: TF-A handoff params: too many partitions (%u/%u)\n",
- TFAHandoffParams->num_entries, FSBL_MAX_PARTITIONS);
- return FSBL_HANDOFF_TOO_MANY_PARTS;
+ HandoffParams->num_entries, XBL_MAX_PARTITIONS);
+ return XBL_HANDOFF_TOO_MANY_PARTS;
}
/*
@@ -177,43 +202,55 @@
* (bl32, bl33). I.e. the last applicable images in the handoff
* structure will be used for the hand off
*/
- for (size_t i = 0; i < TFAHandoffParams->num_entries; i++) {
+ for (size_t i = 0; i < HandoffParams->num_entries; i++) {
entry_point_info_t *image;
int32_t target_estate, target_secure, target_cpu;
uint32_t target_endianness, target_el;
VERBOSE("BL31: %zd: entry:0x%" PRIx64 ", flags:0x%" PRIx64 "\n", i,
- TFAHandoffParams->partition[i].entry_point,
- TFAHandoffParams->partition[i].flags);
+ HandoffParams->partition[i].entry_point,
+ HandoffParams->partition[i].flags);
+
+#if defined(PLAT_versal_net)
+ uint32_t target_cluster;
- target_cpu = get_fsbl_cpu(&TFAHandoffParams->partition[i]);
- if (target_cpu != FSBL_FLAGS_A53_0) {
+ target_cluster = get_xbl_cluster(&HandoffParams->partition[i]);
+ if (target_cluster != XBL_FLAGS_CLUSTER_0) {
+ WARN("BL31: invalid target Cluster (%i)\n",
+ target_cluster);
+ continue;
+ }
+#endif /* PLAT_versal_net */
+
+ target_cpu = get_xbl_cpu(&HandoffParams->partition[i]);
+ if (target_cpu != XBL_FLAGS_A53_0) {
WARN("BL31: invalid target CPU (%i)\n", target_cpu);
continue;
}
- target_el = get_fsbl_el(&TFAHandoffParams->partition[i]);
- if ((target_el == FSBL_FLAGS_EL3) ||
- (target_el == FSBL_FLAGS_EL0)) {
- WARN("BL31: invalid exception level (%i)\n", target_el);
+ target_el = get_xbl_el(&HandoffParams->partition[i]);
+ if ((target_el == XBL_FLAGS_EL3) ||
+ (target_el == XBL_FLAGS_EL0)) {
+ WARN("BL31: invalid target exception level(%i)\n",
+ target_el);
continue;
}
- target_secure = get_fsbl_ss(&TFAHandoffParams->partition[i]);
- if (target_secure == FSBL_FLAGS_SECURE &&
- target_el == FSBL_FLAGS_EL2) {
+ target_secure = get_xbl_ss(&HandoffParams->partition[i]);
+ if (target_secure == XBL_FLAGS_SECURE &&
+ target_el == XBL_FLAGS_EL2) {
WARN("BL31: invalid security state (%i) for exception level (%i)\n",
target_secure, target_el);
continue;
}
- target_estate = get_fsbl_estate(&TFAHandoffParams->partition[i]);
- target_endianness = get_fsbl_endian(&TFAHandoffParams->partition[i]);
+ target_estate = get_xbl_estate(&HandoffParams->partition[i]);
+ target_endianness = get_xbl_endian(&HandoffParams->partition[i]);
- if (target_secure == FSBL_FLAGS_SECURE) {
+ if (target_secure == XBL_FLAGS_SECURE) {
image = bl32;
- if (target_estate == FSBL_FLAGS_ESTATE_A32) {
+ if (target_estate == XBL_FLAGS_ESTATE_A32) {
bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
target_endianness,
DISABLE_ALL_EXCEPTIONS);
@@ -224,8 +261,8 @@
} else {
image = bl33;
- if (target_estate == FSBL_FLAGS_ESTATE_A32) {
- if (target_el == FSBL_FLAGS_EL2) {
+ if (target_estate == XBL_FLAGS_ESTATE_A32) {
+ if (target_el == XBL_FLAGS_EL2) {
target_el = MODE32_hyp;
} else {
target_el = MODE32_sys;
@@ -235,7 +272,7 @@
target_endianness,
DISABLE_ALL_EXCEPTIONS);
} else {
- if (target_el == FSBL_FLAGS_EL2) {
+ if (target_el == XBL_FLAGS_EL2) {
target_el = MODE_EL2;
} else {
target_el = MODE_EL1;
@@ -247,10 +284,10 @@
}
VERBOSE("Setting up %s entry point to:%" PRIx64 ", el:%x\n",
- target_secure == FSBL_FLAGS_SECURE ? "BL32" : "BL33",
- TFAHandoffParams->partition[i].entry_point,
+ target_secure == XBL_FLAGS_SECURE ? "BL32" : "BL33",
+ HandoffParams->partition[i].entry_point,
target_el);
- image->pc = TFAHandoffParams->partition[i].entry_point;
+ image->pc = HandoffParams->partition[i].entry_point;
if (target_endianness == SPSR_E_BIG) {
EP_SET_EE(image->h.attr, EP_EE_BIG);
@@ -259,5 +296,5 @@
}
}
- return FSBL_HANDOFF_SUCCESS;
+ return XBL_HANDOFF_SUCCESS;
}
diff --git a/plat/xilinx/common/pm_service/pm_ipi.c b/plat/xilinx/common/pm_service/pm_ipi.c
index 5e59559..56567dd 100644
--- a/plat/xilinx/common/pm_service/pm_ipi.c
+++ b/plat/xilinx/common/pm_service/pm_ipi.c
@@ -11,11 +11,11 @@
#include <lib/bakery_lock.h>
#include <lib/mmio.h>
#include <lib/spinlock.h>
+#include <plat/common/platform.h>
+
#include <ipi.h>
#include <plat_ipi.h>
#include <plat_private.h>
-#include <plat/common/platform.h>
-
#include "pm_defs.h"
#include "pm_ipi.h"
diff --git a/plat/xilinx/common/pm_service/pm_svc_main.c b/plat/xilinx/common/pm_service/pm_svc_main.c
index bae369e..fb32f2a 100644
--- a/plat/xilinx/common/pm_service/pm_svc_main.c
+++ b/plat/xilinx/common/pm_service/pm_svc_main.c
@@ -11,15 +11,18 @@
*/
#include <errno.h>
-#include <plat_private.h>
#include <stdbool.h>
+
+#include "../drivers/arm/gic/v3/gicv3_private.h"
+
#include <common/runtime_svc.h>
+#include <drivers/arm/gicv3.h>
#include <plat/common/platform.h>
+
+#include <plat_private.h>
#include "pm_api_sys.h"
#include "pm_client.h"
#include "pm_ipi.h"
-#include <drivers/arm/gicv3.h>
-#include "../drivers/arm/gic/v3/gicv3_private.h"
#define MODE 0x80000000U
diff --git a/plat/xilinx/versal/aarch64/versal_helpers.S b/plat/xilinx/versal/aarch64/versal_helpers.S
index 30bbfb4..f868b18 100644
--- a/plat/xilinx/versal/aarch64/versal_helpers.S
+++ b/plat/xilinx/versal/aarch64/versal_helpers.S
@@ -4,9 +4,11 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include <arch.h>
#include <asm_macros.S>
+
+#include <arch.h>
#include <drivers/arm/gicv3.h>
+
#include <platform_def.h>
.globl plat_secondary_cold_boot_setup
diff --git a/plat/xilinx/versal/bl31_versal_setup.c b/plat/xilinx/versal/bl31_versal_setup.c
index e5e095a..0ef92a6 100644
--- a/plat/xilinx/versal/bl31_versal_setup.c
+++ b/plat/xilinx/versal/bl31_versal_setup.c
@@ -8,8 +8,7 @@
#include <assert.h>
#include <errno.h>
-#include <plat_arm.h>
-#include <plat_private.h>
+
#include <bl31/bl31.h>
#include <common/bl_common.h>
#include <common/debug.h>
@@ -19,12 +18,14 @@
#include <lib/mmio.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
#include <plat/common/platform.h>
-#include <versal_def.h>
+#include <plat_arm.h>
+
#include <plat_private.h>
#include <plat_startup.h>
-#include <pm_ipi.h>
-#include "pm_client.h"
#include "pm_api_sys.h"
+#include "pm_client.h"
+#include <pm_ipi.h>
+#include <versal_def.h>
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
@@ -68,9 +69,9 @@
u_register_t arg2, u_register_t arg3)
{
uint64_t tfa_handoff_addr;
- uint32_t payload[PAYLOAD_ARG_CNT], max_size = TFA_HANDOFF_PARAMS_MAX_SIZE;
+ uint32_t payload[PAYLOAD_ARG_CNT], max_size = HANDOFF_PARAMS_MAX_SIZE;
enum pm_ret_status ret_status;
- uint64_t addr[TFA_HANDOFF_PARAMS_MAX_SIZE];
+ uint64_t addr[HANDOFF_PARAMS_MAX_SIZE];
if (VERSAL_CONSOLE_IS(pl011) || (VERSAL_CONSOLE_IS(pl011_1))) {
static console_t versal_runtime_console;
@@ -125,14 +126,14 @@
tfa_handoff_addr = mmio_read_32(PMC_GLOBAL_GLOB_GEN_STORAGE4);
}
- enum fsbl_handoff ret = fsbl_tfa_handover(&bl32_image_ep_info,
+ enum xbl_handoff ret = xbl_handover(&bl32_image_ep_info,
&bl33_image_ep_info,
tfa_handoff_addr);
- if (ret == FSBL_HANDOFF_NO_STRUCT || ret == FSBL_HANDOFF_INVAL_STRUCT) {
+ if (ret == XBL_HANDOFF_NO_STRUCT || ret == XBL_HANDOFF_INVAL_STRUCT) {
bl31_set_default_config();
- } else if (ret == FSBL_HANDOFF_TOO_MANY_PARTS) {
+ } else if (ret == XBL_HANDOFF_TOO_MANY_PARTS) {
ERROR("BL31: Error too many partitions %u\n", ret);
- } else if (ret != FSBL_HANDOFF_SUCCESS) {
+ } else if (ret != XBL_HANDOFF_SUCCESS) {
panic();
} else {
INFO("BL31: PLM to TF-A handover success %u\n", ret);
diff --git a/plat/xilinx/versal/include/plat_ipi.h b/plat/xilinx/versal/include/plat_ipi.h
index e4922e4..4f7cb5f 100644
--- a/plat/xilinx/versal/include/plat_ipi.h
+++ b/plat/xilinx/versal/include/plat_ipi.h
@@ -10,9 +10,10 @@
#ifndef PLAT_IPI_H
#define PLAT_IPI_H
-#include <ipi.h>
#include <stdint.h>
+#include <ipi.h>
+
/*********************************************************************
* IPI agent IDs macros
********************************************************************/
diff --git a/plat/xilinx/versal/include/plat_pm_common.h b/plat/xilinx/versal/include/plat_pm_common.h
index 4c057b8..0b4a115 100644
--- a/plat/xilinx/versal/include/plat_pm_common.h
+++ b/plat/xilinx/versal/include/plat_pm_common.h
@@ -12,8 +12,10 @@
#ifndef PLAT_PM_COMMON_H
#define PLAT_PM_COMMON_H
-#include <common/debug.h>
#include <stdint.h>
+
+#include <common/debug.h>
+
#include "pm_defs.h"
#define NON_SECURE_FLAG 1U
diff --git a/plat/xilinx/versal/include/plat_private.h b/plat/xilinx/versal/include/plat_private.h
index b3f6aca..48f64ea 100644
--- a/plat/xilinx/versal/include/plat_private.h
+++ b/plat/xilinx/versal/include/plat_private.h
@@ -9,8 +9,8 @@
#ifndef PLAT_PRIVATE_H
#define PLAT_PRIVATE_H
-#include <lib/xlat_tables/xlat_tables_v2.h>
#include <bl31/interrupt_mgmt.h>
+#include <lib/xlat_tables/xlat_tables_v2.h>
typedef struct versal_intr_info_type_el3 {
uint32_t id;
diff --git a/plat/xilinx/versal/plat_psci.c b/plat/xilinx/versal/plat_psci.c
index 1bc30f1..56d98f7 100644
--- a/plat/xilinx/versal/plat_psci.c
+++ b/plat/xilinx/versal/plat_psci.c
@@ -6,17 +6,18 @@
*/
#include <assert.h>
-#include <plat_arm.h>
-#include <plat_private.h>
-#include <pm_common.h>
+
#include <common/debug.h>
#include <lib/mmio.h>
#include <lib/psci/psci.h>
-#include <plat/common/platform.h>
#include <plat/arm/common/plat_arm.h>
+#include <plat/common/platform.h>
+#include <plat_arm.h>
+#include <plat_private.h>
#include "pm_api_sys.h"
#include "pm_client.h"
+#include <pm_common.h>
static uintptr_t versal_sec_entry;
diff --git a/plat/xilinx/versal/plat_versal.c b/plat/xilinx/versal/plat_versal.c
index e561048..ba17b1d 100644
--- a/plat/xilinx/versal/plat_versal.c
+++ b/plat/xilinx/versal/plat_versal.c
@@ -4,9 +4,10 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include <plat_private.h>
#include <plat/common/platform.h>
+#include <plat_private.h>
+
int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
{
if ((mpidr & MPIDR_CLUSTER_MASK) != 0U) {
diff --git a/plat/xilinx/versal/pm_service/pm_client.c b/plat/xilinx/versal/pm_service/pm_client.c
index 9ad21a1..ccbfe77 100644
--- a/plat/xilinx/versal/pm_service/pm_client.c
+++ b/plat/xilinx/versal/pm_service/pm_client.c
@@ -11,18 +11,20 @@
*/
#include <assert.h>
-#include <plat_ipi.h>
-#include <platform_def.h>
-#include <versal_def.h>
+
+#include <drivers/arm/gic_common.h>
+#include <drivers/arm/gicv3.h>
#include <lib/bakery_lock.h>
#include <lib/mmio.h>
#include <lib/utils.h>
-#include <drivers/arm/gicv3.h>
-#include <drivers/arm/gic_common.h>
#include <plat/common/platform.h>
+
+#include <plat_ipi.h>
+#include <platform_def.h>
#include "pm_api_sys.h"
#include "pm_client.h"
#include "pm_defs.h"
+#include <versal_def.h>
#define UNDEFINED_CPUID (~0)
diff --git a/plat/xilinx/versal/versal_gicv3.c b/plat/xilinx/versal/versal_gicv3.c
index 33d3d35..197d047 100644
--- a/plat/xilinx/versal/versal_gicv3.c
+++ b/plat/xilinx/versal/versal_gicv3.c
@@ -5,14 +5,15 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include <plat_private.h>
-#include <platform_def.h>
-
#include <common/interrupt_props.h>
#include <drivers/arm/gicv3.h>
#include <lib/utils.h>
#include <plat/common/platform.h>
+#include <plat_private.h>
+#include <platform_def.h>
+
+
/******************************************************************************
* The following functions are defined as weak to allow a platform to override
* the way the GICv3 driver is initialised and used.
diff --git a/plat/xilinx/versal/versal_ipi.c b/plat/xilinx/versal/versal_ipi.c
index 80a2e83..cdee6b5 100644
--- a/plat/xilinx/versal/versal_ipi.c
+++ b/plat/xilinx/versal/versal_ipi.c
@@ -10,6 +10,7 @@
*/
#include <lib/utils_def.h>
+
#include <ipi.h>
#include <plat_ipi.h>
diff --git a/plat/xilinx/versal_net/aarch64/versal_net_helpers.S b/plat/xilinx/versal_net/aarch64/versal_net_helpers.S
index e1e2317..bc62efc 100644
--- a/plat/xilinx/versal_net/aarch64/versal_net_helpers.S
+++ b/plat/xilinx/versal_net/aarch64/versal_net_helpers.S
@@ -6,9 +6,11 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include <arch.h>
#include <asm_macros.S>
+
+#include <arch.h>
#include <drivers/arm/gicv3.h>
+
#include <platform_def.h>
.globl plat_secondary_cold_boot_setup
diff --git a/plat/xilinx/versal_net/bl31_versal_net_setup.c b/plat/xilinx/versal_net/bl31_versal_net_setup.c
index ae9dfe8..79205a3 100644
--- a/plat/xilinx/versal_net/bl31_versal_net_setup.c
+++ b/plat/xilinx/versal_net/bl31_versal_net_setup.c
@@ -25,6 +25,9 @@
#include <plat_private.h>
#include <plat_startup.h>
+#include <pm_api_sys.h>
+#include <pm_client.h>
+#include <pm_ipi.h>
#include <versal_net_def.h>
static entry_point_info_t bl32_image_ep_info;
@@ -70,6 +73,11 @@
{
uint32_t uart_clock;
int32_t rc;
+#if !(TFA_NO_PM)
+ uint64_t tfa_handoff_addr, buff[HANDOFF_PARAMS_MAX_SIZE] = {0};
+ uint32_t payload[PAYLOAD_ARG_CNT], max_size = HANDOFF_PARAMS_MAX_SIZE;
+ enum pm_ret_status ret_status;
+#endif /* !(TFA_NO_PM) */
board_detection();
@@ -136,8 +144,32 @@
SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
+#if !(TFA_NO_PM)
+ PM_PACK_PAYLOAD4(payload, LOADER_MODULE_ID, 1, PM_LOAD_GET_HANDOFF_PARAMS,
+ (uintptr_t)buff >> 32U, (uintptr_t)buff, max_size);
+ ret_status = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
+ if (ret_status == PM_RET_SUCCESS) {
+ enum xbl_handoff xbl_ret;
+
+ tfa_handoff_addr = (uintptr_t)&buff;
+
+ xbl_ret = xbl_handover(&bl32_image_ep_info, &bl33_image_ep_info,
+ tfa_handoff_addr);
+ if (xbl_ret != XBL_HANDOFF_SUCCESS) {
+ ERROR("BL31: PLM to TF-A handover failed %u\n", xbl_ret);
+ panic();
+ }
+
+ INFO("BL31: PLM to TF-A handover success\n");
+ } else {
+ INFO("BL31: setting up default configs\n");
+
+ bl31_set_default_config();
+ }
+#else
bl31_set_default_config();
+#endif /* !(TFA_NO_PM) */
NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc);
NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc);
diff --git a/plat/xilinx/versal_net/pm_service/pm_client.c b/plat/xilinx/versal_net/pm_service/pm_client.c
index d09c927..626611c 100644
--- a/plat/xilinx/versal_net/pm_service/pm_client.c
+++ b/plat/xilinx/versal_net/pm_service/pm_client.c
@@ -16,9 +16,8 @@
#include <drivers/arm/gicv3.h>
#include <lib/bakery_lock.h>
#include <lib/mmio.h>
-#include <lib/mmio.h>
-#include <lib/utils.h>
#include <lib/spinlock.h>
+#include <lib/utils.h>
#include <plat/common/platform.h>
#include <plat_ipi.h>
diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
index 18ccafd..a96c378 100644
--- a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
+++ b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
@@ -13,11 +13,12 @@
#include <lib/mmio.h>
#include <lib/smccc.h>
#include <lib/xlat_tables/xlat_tables.h>
+#include <plat/common/platform.h>
+#include <services/arm_arch_svc.h>
+
#include <plat_ipi.h>
#include <plat_private.h>
#include <plat_startup.h>
-#include <plat/common/platform.h>
-#include <services/arm_arch_svc.h>
#include "zynqmp_pm_api_sys.h"
diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index b00513e..56d402f 100644
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -11,20 +11,20 @@
#include <bl31/bl31.h>
#include <common/bl_common.h>
#include <common/debug.h>
+#include <common/fdt_fixup.h>
+#include <common/fdt_wrappers.h>
#include <drivers/arm/dcc.h>
#include <drivers/console.h>
+#include <lib/mmio.h>
+#include <libfdt.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
-#include <lib/mmio.h>
#include <custom_svc.h>
-#include <plat_startup.h>
#include <plat_private.h>
+#include <plat_startup.h>
#include <zynqmp_def.h>
-#include <common/fdt_fixup.h>
-#include <common/fdt_wrappers.h>
-#include <libfdt.h>
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
@@ -112,11 +112,11 @@
if (zynqmp_get_bootmode() == ZYNQMP_BOOTMODE_JTAG) {
bl31_set_default_config();
} else {
- /* use parameters from FSBL */
- enum fsbl_handoff ret = fsbl_tfa_handover(&bl32_image_ep_info,
+ /* use parameters from XBL */
+ enum xbl_handoff ret = xbl_handover(&bl32_image_ep_info,
&bl33_image_ep_info,
tfa_handoff_addr);
- if (ret != FSBL_HANDOFF_SUCCESS) {
+ if (ret != XBL_HANDOFF_SUCCESS) {
panic();
}
}
diff --git a/plat/xilinx/zynqmp/plat_zynqmp.c b/plat/xilinx/zynqmp/plat_zynqmp.c
index 7b9f41d..e3a979e 100644
--- a/plat/xilinx/zynqmp/plat_zynqmp.c
+++ b/plat/xilinx/zynqmp/plat_zynqmp.c
@@ -4,9 +4,10 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include <plat_private.h>
#include <plat/common/platform.h>
+#include <plat_private.h>
+
int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
{
if (mpidr & MPIDR_CLUSTER_MASK) {
diff --git a/plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c b/plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c
index 1880d9b..e812ad6 100644
--- a/plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c
+++ b/plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c
@@ -13,13 +13,13 @@
#include <drivers/delay_timer.h>
#include <lib/mmio.h>
#include <plat/common/platform.h>
-#include <zynqmp_def.h>
#include "pm_api_clock.h"
#include "pm_api_ioctl.h"
#include "pm_client.h"
#include "pm_common.h"
#include "pm_ipi.h"
+#include <zynqmp_def.h>
#include "zynqmp_pm_api_sys.h"
/**
diff --git a/plat/xilinx/zynqmp/pm_service/pm_client.c b/plat/xilinx/zynqmp/pm_service/pm_client.c
index 8cf29f0..4afa01d 100644
--- a/plat/xilinx/zynqmp/pm_service/pm_client.c
+++ b/plat/xilinx/zynqmp/pm_service/pm_client.c
@@ -21,9 +21,9 @@
#include <lib/utils.h>
#include <plat_ipi.h>
-#include <zynqmp_def.h>
#include "pm_client.h"
#include "pm_ipi.h"
+#include <zynqmp_def.h>
#include "zynqmp_pm_api_sys.h"
#define IRQ_MAX 84U
diff --git a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c
index fc9290c..e297ecb 100644
--- a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c
+++ b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c
@@ -12,14 +12,12 @@
#include <errno.h>
-#include <common/runtime_svc.h>
-#if ZYNQMP_WDT_RESTART
#include <arch_helpers.h>
+#include <common/runtime_svc.h>
#include <drivers/arm/gicv2.h>
#include <lib/mmio.h>
#include <lib/spinlock.h>
#include <plat/common/platform.h>
-#endif
#include <plat_private.h>
#include "pm_client.h"
diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
index eaecb89..ed3300b 100644
--- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
+++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
@@ -8,9 +8,10 @@
#include <common/debug.h>
#include <drivers/console.h>
#include <plat/arm/common/plat_arm.h>
-#include <plat_private.h>
#include <platform_tsp.h>
+#include <plat_private.h>
+
/*******************************************************************************
* Initialize the UART
******************************************************************************/
diff --git a/plat/xilinx/zynqmp/zynqmp_ehf.c b/plat/xilinx/zynqmp/zynqmp_ehf.c
index 56dc79c..18c3749 100644
--- a/plat/xilinx/zynqmp/zynqmp_ehf.c
+++ b/plat/xilinx/zynqmp/zynqmp_ehf.c
@@ -5,10 +5,10 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include <platform_def.h>
-
#include <bl31/ehf.h>
+#include <platform_def.h>
+
/*
* Enumeration of priority levels on ARM platforms.
*/
diff --git a/plat/xilinx/zynqmp/zynqmp_sdei.c b/plat/xilinx/zynqmp/zynqmp_sdei.c
index 984252e..ce68e6a 100644
--- a/plat/xilinx/zynqmp/zynqmp_sdei.c
+++ b/plat/xilinx/zynqmp/zynqmp_sdei.c
@@ -9,9 +9,9 @@
#include <bl31/ehf.h>
#include <common/debug.h>
+#include <plat/common/platform.h>
#include <services/sdei.h>
-#include <plat/common/platform.h>
#include <platform_def.h>
int arm_validate_ns_entrypoint(uintptr_t entrypoint)
diff --git a/tools/cert_create/Makefile b/tools/cert_create/Makefile
index 042e844..b911d19 100644
--- a/tools/cert_create/Makefile
+++ b/tools/cert_create/Makefile
@@ -85,9 +85,9 @@
.PHONY: all clean realclean --openssl
-all: ${BINARY}
+all: --openssl ${BINARY}
-${BINARY}: --openssl ${OBJECTS} Makefile
+${BINARY}: ${OBJECTS} Makefile
@echo " HOSTLD $@"
@echo 'const char build_msg[] = "Built : "__TIME__", "__DATE__; \
const char platform_msg[] = "${PLAT_MSG}";' | \
diff --git a/tools/encrypt_fw/Makefile b/tools/encrypt_fw/Makefile
index 2939b14..924e5fe 100644
--- a/tools/encrypt_fw/Makefile
+++ b/tools/encrypt_fw/Makefile
@@ -65,9 +65,9 @@
.PHONY: all clean realclean --openssl
-all: ${BINARY}
+all: --openssl ${BINARY}
-${BINARY}: --openssl ${OBJECTS} Makefile
+${BINARY}: ${OBJECTS} Makefile
@echo " HOSTLD $@"
@echo 'const char build_msg[] = "Built : "__TIME__", "__DATE__;' | \
${HOSTCC} -c ${HOSTCCFLAGS} -xc - -o src/build_msg.o
diff --git a/tools/fiptool/Makefile b/tools/fiptool/Makefile
index 2ebee33..4bdebd9 100644
--- a/tools/fiptool/Makefile
+++ b/tools/fiptool/Makefile
@@ -68,9 +68,9 @@
.PHONY: all clean distclean --openssl
-all: ${PROJECT}
+all: --openssl ${PROJECT}
-${PROJECT}: --openssl ${OBJECTS} Makefile
+${PROJECT}: ${OBJECTS} Makefile
@echo " HOSTLD $@"
${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS}
@${ECHO_BLANK_LINE}