refactor(cpus): convert the Cortex-x2 to use the errata framework
This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive
It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.
Testing was conducted by:
* Building for release with all errata flags enabled and running script
in change 19136 to compare output of objdump for each errata.
* Testing via script was not complete, as it directed to verify the
check and the workaround functions of few erratas manually.
* Manual comparison of disassembly of converted functions with non-
converted functions
aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/../release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf
* Manual comparison of disassembly of both both files(bl31.elf)
ensured,the ported changes were identical and hence verified.
* Build for release with all errata flags enabled and run default tftf
tests.
CROSS_COMPILE=aarch64-none-elf- \
make PLAT=fvp \
ARCH=aarch64 \
DEBUG=0 \
HW_ASSISTED_COHERENCY=1 \
USE_COHERENT_MEM=0 \
CTX_INCLUDE_AARCH32_REGS=0 \
ERRATA_X2_2002765=1 \
ERRATA_X2_2017096=1 \
ERRATA_X2_2058056=1 \
ERRATA_X2_2081180=1 \
ERRATA_X2_2083908=1 \
ERRATA_X2_2147715=1 \
ERRATA_X2_2216384=1 \
ERRATA_X2_2282622=1 \
ERRATA_X2_2371105=1 \
ERRATA_X2_2768515=1 \
WORKAROUND_CVE_2022_23960=1 \
ERRATA_DSU_2313941=1 \
BL33=/home/jaychi01/tf_a/tf-a-tests/build/fvp/release/tftf.bin \
fip all -j12
* Build for debug with all errata enabled and step through ArmDS
at reset to ensure that if Errata are applicable then the workaround
functions are entered precisely.
Change-Id: Icd2268cdf27f41240c92e3df23b5ad22f3ce3124
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
diff --git a/lib/cpus/aarch64/cortex_x2.S b/lib/cpus/aarch64/cortex_x2.S
index b324791..5245e10 100644
--- a/lib/cpus/aarch64/cortex_x2.S
+++ b/lib/cpus/aarch64/cortex_x2.S
@@ -26,20 +26,7 @@
wa_cve_2022_23960_bhb_vector_table CORTEX_X2_BHB_LOOP_COUNT, cortex_x2
#endif /* WORKAROUND_CVE_2022_23960 */
- /* --------------------------------------------------
- * Errata Workaround for Cortex X2 Errata #2002765.
- * This applies to revisions r0p0, r1p0, and r2p0 and
- * is open.
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0, x1, x17
- * --------------------------------------------------
- */
-func errata_cortex_x2_2002765_wa
- /* Check workaround compatibility. */
- mov x17, x30
- bl check_errata_2002765
- cbz x0, 1f
-
+workaround_reset_start cortex_x2, ERRATUM(2002765), ERRATA_X2_2002765
ldr x0, =0x6
msr S3_6_C15_C8_0, x0 /* CPUPSELR_EL3 */
ldr x0, =0xF3A08002
@@ -48,90 +35,28 @@
msr S3_6_C15_C8_3, x0 /* CPUPMR_EL3 */
ldr x0, =0x40000001003ff
msr S3_6_C15_C8_1, x0 /* CPUPCR_EL3 */
- isb
+workaround_reset_end cortex_x2, ERRATUM(2002765)
-1:
- ret x17
-endfunc errata_cortex_x2_2002765_wa
+check_erratum_ls cortex_x2, ERRATUM(2002765), CPU_REV(2, 0)
-func check_errata_2002765
- /* Applies to r0p0 - r2p0 */
- mov x1, #0x20
- b cpu_rev_var_ls
-endfunc check_errata_2002765
-
- /* --------------------------------------------------
- * Errata Workaround for Cortex-X2 Errata 2017096.
- * This applies only to revisions r0p0, r1p0 and r2p0
- * and is fixed in r2p1.
- * Inputs:
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0, x1, x17
- * --------------------------------------------------
- */
-func errata_x2_2017096_wa
- /* Compare x0 against revision r0p0 to r2p0 */
- mov x17, x30
- bl check_errata_2017096
- cbz x0, 1f
+workaround_reset_start cortex_x2, ERRATUM(2017096), ERRATA_X2_2017096
mrs x1, CORTEX_X2_CPUECTLR_EL1
orr x1, x1, CORTEX_X2_CPUECTLR_EL1_PFSTIDIS_BIT
msr CORTEX_X2_CPUECTLR_EL1, x1
+workaround_reset_end cortex_x2, ERRATUM(2017096)
-1:
- ret x17
-endfunc errata_x2_2017096_wa
+check_erratum_ls cortex_x2, ERRATUM(2017096), CPU_REV(2, 0)
-func check_errata_2017096
- /* Applies to r0p0, r1p0, r2p0 */
- mov x1, #0x20
- b cpu_rev_var_ls
-endfunc check_errata_2017096
-
- /* --------------------------------------------------
- * Errata Workaround for Cortex X2 Errata #2058056.
- * This applies to revisions r0p0, r1p0, and r2p0 and
- * is open.
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0, x1, x17
- * --------------------------------------------------
- */
-func errata_cortex_x2_2058056_wa
- /* Check workaround compatibility. */
- mov x17, x30
- bl check_errata_2058056
- cbz x0, 1f
-
+workaround_reset_start cortex_x2, ERRATUM(2058056), ERRATA_X2_2058056
mrs x1, CORTEX_X2_CPUECTLR2_EL1
mov x0, #CORTEX_X2_CPUECTLR2_EL1_PF_MODE_CNSRV
bfi x1, x0, #CORTEX_X2_CPUECTLR2_EL1_PF_MODE_SHIFT, #CORTEX_X2_CPUECTLR2_EL1_PF_MODE_WIDTH
msr CORTEX_X2_CPUECTLR2_EL1, x1
-
-1:
- ret x17
-endfunc errata_cortex_x2_2058056_wa
+workaround_reset_end cortex_x2, ERRATUM(2058056)
-func check_errata_2058056
- /* Applies to r0p0 - r2p0 */
- mov x1, #0x20
- b cpu_rev_var_ls
-endfunc check_errata_2058056
+check_erratum_ls cortex_x2, ERRATUM(2058056), CPU_REV(2, 0)
- /* --------------------------------------------------
- * Errata Workaround for Cortex-X2 Errata 2081180.
- * This applies to revision r0p0, r1p0 and r2p0
- * and is fixed in r2p1.
- * Inputs:
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0, x1, x17
- * --------------------------------------------------
- */
-func errata_x2_2081180_wa
- /* Check revision. */
- mov x17, x30
- bl check_errata_2081180
- cbz x0, 1f
-
+workaround_reset_start cortex_x2, ERRATUM(2081180), ERRATA_X2_2081180
/* Apply instruction patching sequence */
ldr x0, =0x3
msr CORTEX_X2_IMP_CPUPSELR_EL3, x0
@@ -149,90 +74,29 @@
msr CORTEX_X2_IMP_CPUPMR_EL3, x0
ldr x0, =0x10002001003F3
msr CORTEX_X2_IMP_CPUPCR_EL3, x0
- isb
-1:
- ret x17
-endfunc errata_x2_2081180_wa
+workaround_reset_end cortex_x2, ERRATUM(2081180)
-func check_errata_2081180
- /* Applies to r0p0, r1p0 and r2p0 */
- mov x1, #0x20
- b cpu_rev_var_ls
-endfunc check_errata_2081180
+check_erratum_ls cortex_x2, ERRATUM(2081180), CPU_REV(2, 0)
- /* --------------------------------------------------
- * Errata Workaround for Cortex X2 Errata #2083908.
- * This applies to revision r2p0 and is open.
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0-x2, x17
- * --------------------------------------------------
- */
-func errata_cortex_x2_2083908_wa
- /* Check workaround compatibility. */
- mov x17, x30
- bl check_errata_2083908
- cbz x0, 1f
-
+workaround_reset_start cortex_x2, ERRATUM(2083908), ERRATA_X2_2083908
/* Apply the workaround by setting bit 13 in CPUACTLR5_EL1. */
mrs x1, CORTEX_X2_CPUACTLR5_EL1
orr x1, x1, #BIT(13)
msr CORTEX_X2_CPUACTLR5_EL1, x1
+workaround_reset_end cortex_x2, ERRATUM(2083908)
-1:
- ret x17
-endfunc errata_cortex_x2_2083908_wa
+check_erratum_range cortex_x2, ERRATUM(2083908), CPU_REV(2, 0), CPU_REV(2, 0)
-func check_errata_2083908
- /* Applies to r2p0 */
- mov x1, #0x20
- mov x2, #0x20
- b cpu_rev_var_range
-endfunc check_errata_2083908
-
- /* ---------------------------------------------------------
- * Errata Workaround for Cortex-X2 Errata 2147715.
- * This applies only to revisions r2p0 and is fixed in r2p1.
- * Inputs:
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0, x1, x17
- * ---------------------------------------------------------
- */
-func errata_x2_2147715_wa
- /* Compare x0 against revision r2p0 */
- mov x17, x30
- bl check_errata_2147715
- cbz x0, 1f
-
+workaround_reset_start cortex_x2, ERRATUM(2147715), ERRATA_X2_2147715
/* Apply the workaround by setting bit 22 in CPUACTLR_EL1. */
mrs x1, CORTEX_X2_CPUACTLR_EL1
orr x1, x1, CORTEX_X2_CPUACTLR_EL1_BIT_22
msr CORTEX_X2_CPUACTLR_EL1, x1
+workaround_reset_end cortex_x2, ERRATUM(2147715)
-1:
- ret x17
-endfunc errata_x2_2147715_wa
+check_erratum_range cortex_x2, ERRATUM(2147715), CPU_REV(2, 0), CPU_REV(2, 0)
-func check_errata_2147715
- /* Applies to r2p0 */
- mov x1, #0x20
- mov x2, #0x20
- b cpu_rev_var_range
-endfunc check_errata_2147715
-
- /* --------------------------------------------------
- * Errata Workaround for Cortex X2 Errata 2216384.
- * This applies to revisions r0p0, r1p0, and r2p0
- * and is fixed in r2p1.
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0, x1, x17
- * --------------------------------------------------
- */
-func errata_x2_2216384_wa
- /* Check workaround compatibility. */
- mov x17, x30
- bl check_errata_2216384
- cbz x0, 1f
-
+workaround_reset_start cortex_x2, ERRATUM(2216384), ERRATA_X2_2216384
mrs x1, CORTEX_X2_CPUACTLR5_EL1
orr x1, x1, CORTEX_X2_CPUACTLR5_EL1_BIT_17
msr CORTEX_X2_CPUACTLR5_EL1, x1
@@ -246,108 +110,57 @@
msr CORTEX_X2_IMP_CPUPMR_EL3, x0
ldr x0, =0x80000000003FF
msr CORTEX_X2_IMP_CPUPCR_EL3, x0
- isb
+workaround_reset_end cortex_x2, ERRATUM(2216384)
-1:
- ret x17
-endfunc errata_x2_2216384_wa
+check_erratum_ls cortex_x2, ERRATUM(2216384), CPU_REV(2, 0)
-func check_errata_2216384
- /* Applies to r0p0 - r2p0 */
- mov x1, #0x20
- b cpu_rev_var_ls
-endfunc check_errata_2216384
-
- /* ---------------------------------------------------------------
- * Errata Workaround for Cortex-X2 Erratum 2282622.
- * This applies to revision r0p0, r1p0, r2p0 and r2p1.
- * It is still open.
- * Inputs:
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0, x1, x17
- * ---------------------------------------------------------------
- */
-func errata_x2_2282622_wa
- /* Compare x0 against revision r2p1 */
- mov x17, x30
- bl check_errata_2282622
- cbz x0, 1f
-
+workaround_reset_start cortex_x2, ERRATUM(2282622), ERRATA_X2_2282622
/* Apply the workaround */
mrs x1, CORTEX_X2_CPUACTLR2_EL1
orr x1, x1, #BIT(0)
msr CORTEX_X2_CPUACTLR2_EL1, x1
-
-1:
- ret x17
-endfunc errata_x2_2282622_wa
+workaround_reset_end cortex_x2, ERRATUM(2282622)
-func check_errata_2282622
- /* Applies to r0p0, r1p0, r2p0 and r2p1 */
- mov x1, #0x21
- b cpu_rev_var_ls
-endfunc check_errata_2282622
+check_erratum_ls cortex_x2, ERRATUM(2282622), CPU_REV(2, 1)
- /* -------------------------------------------------------
- * Errata Workaround for Cortex-X2 Erratum 2371105.
- * This applies to revisions <= r2p0 and is fixed in r2p1.
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0-x17
- * -------------------------------------------------------
- */
-func errata_x2_2371105_wa
- /* Check workaround compatibility. */
- mov x17, x30
- bl check_errata_2371105
- cbz x0, 1f
-
+workaround_reset_start cortex_x2, ERRATUM(2371105), ERRATA_X2_2371105
/* Set bit 40 in CPUACTLR2_EL1 */
mrs x1, CORTEX_X2_CPUACTLR2_EL1
orr x1, x1, #CORTEX_X2_CPUACTLR2_EL1_BIT_40
msr CORTEX_X2_CPUACTLR2_EL1, x1
- isb
-1:
- ret x17
-endfunc errata_x2_2371105_wa
-
-func check_errata_2371105
- /* Applies to <= r2p0. */
- mov x1, #0x20
- b cpu_rev_var_ls
-endfunc check_errata_2371105
+workaround_reset_end cortex_x2, ERRATUM(2371105)
- /* ----------------------------------------------------
- * Errata Workaround for Cortex-X2 Errata #2768515
- * This applies to revisions <= r2p1 and is still open.
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0-x17
- * ----------------------------------------------------
- */
-func errata_x2_2768515_wa
- mov x17, x30
- bl check_errata_2768515
- cbz x0, 1f
+check_erratum_ls cortex_x2, ERRATUM(2371105), CPU_REV(2, 0)
+workaround_reset_start cortex_x2, ERRATUM(2768515), ERRATA_X2_2768515
/* dsb before isb of power down sequence */
dsb sy
-1:
- ret x17
-endfunc errata_x2_2768515_wa
+workaround_reset_end cortex_x2, ERRATUM(2768515)
-func check_errata_2768515
- /* Applies to all revisions <= r2p1 */
- mov x1, #0x21
- b cpu_rev_var_ls
-endfunc check_errata_2768515
+check_erratum_ls cortex_x2, ERRATUM(2768515), CPU_REV(2, 1)
-func check_errata_cve_2022_23960
-#if WORKAROUND_CVE_2022_23960
- mov x0, #ERRATA_APPLIES
-#else
- mov x0, #ERRATA_MISSING
-#endif
- ret
-endfunc check_errata_cve_2022_23960
+workaround_reset_start cortex_x2, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
+#if IMAGE_BL31
+ /*
+ * The Cortex-X2 generic vectors are overridden to apply errata
+ * mitigation on exception entry from lower ELs.
+ */
+ adr x0, wa_cve_vbar_cortex_x2
+ msr vbar_el3, x0
+#endif /* IMAGE_BL31 */
+workaround_reset_end cortex_x2, CVE(2022, 23960)
+
+check_erratum_chosen cortex_x2, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
+
+/*
+ * ERRATA_DSU_2313941 :
+ * The errata is defined in dsu_helpers.S but applies to cortex_x2
+ * as well. Henceforth creating symbolic names to the already existing errata
+ * workaround functions to get them registered under the Errata Framework.
+ */
+.equ check_erratum_cortex_x2_2313941, check_errata_dsu_2313941
+.equ erratum_cortex_x2_2313941_wa, errata_dsu_2313941_wa
+add_erratum_entry cortex_x2, ERRATUM(2313941), ERRATA_DSU_2313941, APPLY_AT_RESET
/* ----------------------------------------------------
* HW will do the cache maintenance while powering down
@@ -364,116 +177,19 @@
#if ERRATA_X2_2768515
mov x15, x30
bl cpu_get_rev_var
- bl errata_x2_2768515_wa
+ bl erratum_cortex_x2_2768515_wa
mov x30, x15
#endif /* ERRATA_X2_2768515 */
isb
ret
endfunc cortex_x2_core_pwr_dwn
- /*
- * Errata printing function for Cortex X2. Must follow AAPCS.
- */
-#if REPORT_ERRATA
-func cortex_x2_errata_report
- stp x8, x30, [sp, #-16]!
-
- bl cpu_get_rev_var
- mov x8, x0
+errata_report_shim cortex_x2
- /*
- * Report all errata. The revision-variant information is passed to
- * checking functions of each errata.
- */
- report_errata ERRATA_X2_2002765, cortex_x2, 2002765
- report_errata ERRATA_X2_2017096, cortex_x2, 2017096
- report_errata ERRATA_X2_2058056, cortex_x2, 2058056
- report_errata ERRATA_X2_2081180, cortex_x2, 2081180
- report_errata ERRATA_X2_2083908, cortex_x2, 2083908
- report_errata ERRATA_X2_2147715, cortex_x2, 2147715
- report_errata ERRATA_X2_2216384, cortex_x2, 2216384
- report_errata ERRATA_X2_2282622, cortex_x2, 2282622
- report_errata ERRATA_X2_2371105, cortex_x2, 2371105
- report_errata ERRATA_X2_2768515, cortex_x2, 2768515
- report_errata WORKAROUND_CVE_2022_23960, cortex_x2, cve_2022_23960
- report_errata ERRATA_DSU_2313941, cortex_x2, dsu_2313941
-
- ldp x8, x30, [sp], #16
- ret
-endfunc cortex_x2_errata_report
-#endif
-
-func cortex_x2_reset_func
- mov x19, x30
-
+cpu_reset_func_start cortex_x2
/* Disable speculative loads */
msr SSBS, xzr
-
- /* Get the CPU revision and stash it in x18. */
- bl cpu_get_rev_var
- mov x18, x0
-
-#if ERRATA_DSU_2313941
- bl errata_dsu_2313941_wa
-#endif
-
-#if ERRATA_X2_2002765
- mov x0, x18
- bl errata_cortex_x2_2002765_wa
-#endif
-
-#if ERRATA_X2_2058056
- mov x0, x18
- bl errata_cortex_x2_2058056_wa
-#endif
-
-#if ERRATA_X2_2083908
- mov x0, x18
- bl errata_cortex_x2_2083908_wa
-#endif
-
-#if ERRATA_X2_2017096
- mov x0, x18
- bl errata_x2_2017096_wa
-#endif
-
-#if ERRATA_X2_2081180
- mov x0, x18
- bl errata_x2_2081180_wa
-#endif
-
-#if ERRATA_X2_2216384
- mov x0, x18
- bl errata_x2_2216384_wa
-#endif
-
-#if ERRATA_X2_2147715
- mov x0, x18
- bl errata_x2_2147715_wa
-#endif
-
-#if ERRATA_X2_2282622
- mov x0, x18
- bl errata_x2_2282622_wa
-#endif
-
-#if ERRATA_X2_2371105
- mov x0, x18
- bl errata_x2_2371105_wa
-#endif
-
-#if IMAGE_BL31 && WORKAROUND_CVE_2022_23960
- /*
- * The Cortex-X2 generic vectors are overridden to apply errata
- * mitigation on exception entry from lower ELs.
- */
- adr x0, wa_cve_vbar_cortex_x2
- msr vbar_el3, x0
-#endif /* IMAGE_BL31 && WORKAROUND_CVE_2022_23960 */
-
- isb
- ret x19
-endfunc cortex_x2_reset_func
+cpu_reset_func_end cortex_x2
/* ---------------------------------------------
* This function provides Cortex X2 specific