tree c457ee777dd218e5a5e62a615415ac99b9fe7b34
parent 59c3aa054de255118179339143826fc397d03aa2
author Varun Wadekar <vwadekar@nvidia.com> 1442203299 +0530
committer Varun Wadekar <vwadekar@nvidia.com> 1490026322 -0700

Tegra186: power on/off secondary CPUs

This patch add code to power on/off the secondary CPUs on the Tegra186
chip. The MCE block is the actual hardware that takes care of the
power on/off sequence. We pass the constructed CPU #, depending on the
MIDR_IMPL field, to the MCE CPU handlers.

This patch also programs the reset vector addresses to allow the
CPUs to power on through the monitor and then jump to the linux
world.

Change-Id: Idc164586cda91c2009d66f3e09bf4464de9662db
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>