rockchip: update the raw read/write APIs for M0
Since the ATF project, we usually use the mmio_read_32 and
mmio_write_32. And the mmio_write_32, the firse parameter
is ADDR, the second is VALUE. In order to style consistency:
1/ rename readl/writel to mmio_read_32/mmio_write_32
2/ for keeping the same with mmio_write_32 in the ATF project,
swap the order of the parameters for M0 mmio_write_32
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
diff --git a/plat/rockchip/rk3399/drivers/m0/include/rk3399_mcu.h b/plat/rockchip/rk3399/drivers/m0/include/rk3399_mcu.h
index 7ea40fa..d04c06e 100644
--- a/plat/rockchip/rk3399/drivers/m0/include/rk3399_mcu.h
+++ b/plat/rockchip/rk3399/drivers/m0/include/rk3399_mcu.h
@@ -31,9 +31,9 @@
#ifndef __RK3399_MCU_H__
#define __RK3399_MCU_H__
-#define readl(c) ({unsigned int __v = \
+#define mmio_read_32(c) ({unsigned int __v = \
(*(volatile unsigned int *)(c)); __v; })
-#define writel(v, c) ((*(volatile unsigned int *) (c)) = (v))
+#define mmio_write_32(c, v) ((*(volatile unsigned int *)(c)) = (v))
#define MCU_BASE 0x40000000
#define PMU_BASE (MCU_BASE + 0x07310000)