tree 5c12f6b409eec680055406e13e81a0a2b7d7a118
parent 4cff3082c71139d2b3bd72eb5f2bcf7e8bb9f65a
author Grzegorz Jaszczyk <jaz@semihalf.com> 1531736283 +0200
committer Konstantin Porotchkin <kostap@marvell.com> 1535886647 +0300

mvebu: cp110: fix spelling in register definition

Use PF instead of PP post-fix, since it is referring to "Phase Final"
(only G3 related register had correct spelling for relevant bit).

Change-Id: Ia5a9c9c78b74b15f7f8adde2c3ef4784c513da2c
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>