commit a913e5b4847a816133fc7c85491c56162305ba02
author Madhukar Pappireddy <madhukar.pappireddy@arm.com> Fri Feb 05 18:33:33 2021 +0000
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Fri Feb 05 18:33:33 2021 +0000
tree 4000b7d0ae8a216ceeda45d3a0bca3d2aa082b00
parent 92c0f232ff4cc31d36542e42aebf2b8bf7678fc6
parent 3caba8ffda17690917def7cf2231d69ea0d8470f

Merge "ddr: stm32mp1_ddr: correct SELFREF_TO_X32 mask" into integration

include/drivers/st/stm32mp1_ddr_regs.h

diff --git a/include/drivers/st/stm32mp1_ddr_regs.h b/include/drivers/st/stm32mp1_ddr_regs.h
index 342239a..01d6638 100644
--- a/include/drivers/st/stm32mp1_ddr_regs.h
+++ b/include/drivers/st/stm32mp1_ddr_regs.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
  *
  * SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  */
@@ -284,7 +284,7 @@
 #define DDRCTRL_PWRCTL_EN_DFI_DRAM_CLK_DISABLE	BIT(3)
 #define DDRCTRL_PWRCTL_SELFREF_SW		BIT(5)
 
-#define DDRCTRL_PWRTMG_SELFREF_TO_X32_MASK	GENMASK(19, 12)
+#define DDRCTRL_PWRTMG_SELFREF_TO_X32_MASK	GENMASK(23, 16)
 #define DDRCTRL_PWRTMG_SELFREF_TO_X32_0		BIT(16)
 
 #define DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH	BIT(0)