fix(rmmd): enable sme using sme_enable_per_world
Enable SME for RMM using sme_enable_per_world as well as sme_enable.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I6070f4778e507ac9cbc7442e727bedad9b40e635
diff --git a/services/std_svc/rmmd/rmmd_main.c b/services/std_svc/rmmd/rmmd_main.c
index d6d25d8..8b78b13 100644
--- a/services/std_svc/rmmd/rmmd_main.c
+++ b/services/std_svc/rmmd/rmmd_main.c
@@ -125,17 +125,13 @@
pmuv3_enable(ctx);
/*
- * If SME/SME2 is supported and enabled for NS world, then enables SME
- * for Realm world. RMM will save/restore required registers that are
- * shared with SVE/FPU so that Realm can use FPU or SVE.
+ * Enable access to TPIDR2_EL0 if SME/SME2 is enabled for Non Secure world.
*/
if (is_feat_sme_supported()) {
- /* sme_enable() also enables SME2 if supported by hardware */
sme_enable(ctx);
}
}
-#if IMAGE_BL31
static void manage_extensions_realm_per_world(void)
{
if (is_feat_sve_supported()) {
@@ -152,8 +148,15 @@
sys_reg_trace_disable_per_world(&per_world_context[CPU_CONTEXT_REALM]);
}
+ /*
+ * If SME/SME2 is supported and enabled for NS world, then disable trapping
+ * of SME instructions for Realm world. RMM will save/restore required
+ * registers that are shared with SVE/FPU so that Realm can use FPU or SVE.
+ */
+ if (is_feat_sme_supported()) {
+ sme_enable_per_world(&per_world_context[CPU_CONTEXT_REALM]);
+ }
}
-#endif /* IMAGE_BL31 */
/*******************************************************************************
* Jump to the RMM for the first time.