Add support to indicate size and end of assembly functions
In order for the symbol table in the ELF file to contain the size of
functions written in assembly, it is necessary to report it to the
assembler using the .size directive.
To fulfil the above requirements, this patch introduces an 'endfunc'
macro which contains the .endfunc and .size directives. It also adds
a .func directive to the 'func' assembler macro.
The .func/.endfunc have been used so the assembler can fail if
endfunc is omitted.
Fixes ARM-Software/tf-issues#295
Change-Id: If8cb331b03d7f38fe7e3694d4de26f1075b278fc
Signed-off-by: Kévin Petit <kevin.petit@arm.com>
diff --git a/plat/common/aarch64/platform_helpers.S b/plat/common/aarch64/platform_helpers.S
index c236fd7..c117449 100644
--- a/plat/common/aarch64/platform_helpers.S
+++ b/plat/common/aarch64/platform_helpers.S
@@ -52,6 +52,7 @@
and x0, x0, #MPIDR_CLUSTER_MASK
add x0, x1, x0, LSR #6
ret
+endfunc platform_get_core_pos
/* -----------------------------------------------------
* Placeholder function which should be redefined by
@@ -61,6 +62,7 @@
func platform_check_mpidr
mov x0, xzr
ret
+endfunc platform_check_mpidr
/* -----------------------------------------------------
* Placeholder function which should be redefined by
@@ -69,6 +71,7 @@
*/
func plat_report_exception
ret
+endfunc plat_report_exception
/* -----------------------------------------------------
* Placeholder function which should be redefined by
@@ -78,6 +81,7 @@
func plat_crash_console_init
mov x0, #0
ret
+endfunc plat_crash_console_init
/* -----------------------------------------------------
* Placeholder function which should be redefined by
@@ -86,6 +90,7 @@
*/
func plat_crash_console_putc
ret
+endfunc plat_crash_console_putc
/* -----------------------------------------------------
* Placeholder function which should be redefined by
@@ -94,6 +99,7 @@
*/
func plat_reset_handler
ret
+endfunc plat_reset_handler
/* -----------------------------------------------------
* Placeholder function which should be redefined by
@@ -103,3 +109,4 @@
*/
func plat_disable_acp
ret
+endfunc plat_disable_acp
diff --git a/plat/common/aarch64/platform_mp_stack.S b/plat/common/aarch64/platform_mp_stack.S
index 8eb1aa6..7a98d29 100644
--- a/plat/common/aarch64/platform_mp_stack.S
+++ b/plat/common/aarch64/platform_mp_stack.S
@@ -49,6 +49,7 @@
mov x10, x30 // lr
get_mp_stack platform_normal_stacks, PLATFORM_STACK_SIZE
ret x10
+endfunc platform_get_stack
/* -----------------------------------------------------
* void platform_set_stack (unsigned long mpidr)
@@ -62,6 +63,7 @@
bl platform_get_stack
mov sp, x0
ret x9
+endfunc platform_set_stack
/* -----------------------------------------------------
* Per-cpu stacks in normal memory. Each cpu gets a
diff --git a/plat/common/aarch64/platform_up_stack.S b/plat/common/aarch64/platform_up_stack.S
index 73b74b2..ea6641a 100644
--- a/plat/common/aarch64/platform_up_stack.S
+++ b/plat/common/aarch64/platform_up_stack.S
@@ -48,6 +48,7 @@
func platform_get_stack
get_up_stack platform_normal_stacks, PLATFORM_STACK_SIZE
ret
+endfunc platform_get_stack
/* -----------------------------------------------------
* void platform_set_stack (unsigned long)
@@ -61,6 +62,7 @@
get_up_stack platform_normal_stacks, PLATFORM_STACK_SIZE
mov sp, x0
ret
+endfunc platform_set_stack
/* -----------------------------------------------------
* Single cpu stack in normal memory.
diff --git a/plat/fvp/aarch64/fvp_helpers.S b/plat/fvp/aarch64/fvp_helpers.S
index e678b43..c661ff3 100644
--- a/plat/fvp/aarch64/fvp_helpers.S
+++ b/plat/fvp/aarch64/fvp_helpers.S
@@ -97,6 +97,7 @@
wfi
cb_panic:
b cb_panic
+endfunc plat_secondary_cold_boot_setup
/* -----------------------------------------------------
@@ -148,6 +149,7 @@
exit:
ret x9
_panic: b _panic
+endfunc platform_get_entrypoint
/* -----------------------------------------------------
@@ -170,6 +172,7 @@
subs w1, w1, #1
b.gt loop
ret
+endfunc platform_mem_init
/* ---------------------------------------------
* void plat_report_exception(unsigned int type)
@@ -191,12 +194,14 @@
add x1, x1, #V2M_SYS_LED
str w0, [x1]
ret
+endfunc plat_report_exception
func platform_is_primary_cpu
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
cmp x0, #FVP_PRIMARY_CPU
cset x0, eq
ret
+endfunc platform_is_primary_cpu
/* Define a crash console for the plaform */
#define FVP_CRASH_CONSOLE_BASE PL011_UART1_BASE
@@ -213,6 +218,7 @@
mov_imm x1, PL011_UART1_CLK_IN_HZ
mov_imm x2, PL011_BAUDRATE
b console_core_init
+endfunc plat_crash_console_init
/* ---------------------------------------------
* int plat_crash_console_putc(int c)
@@ -224,3 +230,4 @@
func plat_crash_console_putc
mov_imm x1, FVP_CRASH_CONSOLE_BASE
b console_core_putc
+endfunc plat_crash_console_putc
diff --git a/plat/juno/aarch64/bl1_plat_helpers.S b/plat/juno/aarch64/bl1_plat_helpers.S
index 3054eab..9b92979 100644
--- a/plat/juno/aarch64/bl1_plat_helpers.S
+++ b/plat/juno/aarch64/bl1_plat_helpers.S
@@ -53,6 +53,7 @@
cmp x0, x1
cset x0, eq
ret x9
+endfunc platform_is_primary_cpu
/* -----------------------------------------------------
* void plat_secondary_cold_boot_setup (void);
@@ -67,6 +68,7 @@
/* Juno todo: Implement secondary CPU cold boot setup on Juno */
cb_panic:
b cb_panic
+endfunc plat_secondary_cold_boot_setup
/* -----------------------------------------------------
@@ -91,6 +93,7 @@
lsl x0, x0, #TRUSTED_MAILBOX_SHIFT
ldr x0, [x1, x0]
ret x9
+endfunc platform_get_entrypoint
/* -----------------------------------------------------
@@ -140,3 +143,4 @@
cb_init_panic:
b cb_init_panic
+endfunc platform_cold_boot_init
diff --git a/plat/juno/aarch64/plat_helpers.S b/plat/juno/aarch64/plat_helpers.S
index 77901f0..6fa66e1 100644
--- a/plat/juno/aarch64/plat_helpers.S
+++ b/plat/juno/aarch64/plat_helpers.S
@@ -58,6 +58,7 @@
mov_imm x1, PL011_UART3_CLK_IN_HZ
mov_imm x2, PL011_BAUDRATE
b console_core_init
+endfunc plat_crash_console_init
/* ---------------------------------------------
* int plat_crash_console_putc(int c)
@@ -69,6 +70,7 @@
func plat_crash_console_putc
mov_imm x1, JUNO_CRASH_CONSOLE_BASE
b console_core_putc
+endfunc plat_crash_console_putc
/* ---------------------------------------------
* void plat_report_exception(unsigned int type)
@@ -90,6 +92,7 @@
add x1, x1, #V2M_SYS_LED
str w0, [x1]
ret
+endfunc plat_report_exception
/*
* Return 0 to 3 for the A53s and 4 or 5 for the A57s
@@ -100,6 +103,7 @@
eor x0, x0, #(1 << MPIDR_AFFINITY_BITS) // swap A53/A57 order
add x0, x1, x0, LSR #6
ret
+endfunc platform_get_core_pos
/* -----------------------------------------------------
@@ -111,6 +115,7 @@
*/
func platform_mem_init
ret
+endfunc platform_mem_init
/* --------------------------------------------------------------------
* void plat_reset_handler(void);
@@ -197,3 +202,4 @@
isb
#endif /* FIRST_RESET_HANDLER_CALL */
ret
+endfunc plat_reset_handler