intel: agilex: Fix reliance on hard coded clock information
Extract clock information for UART, MMC & Watchdog from the clock manager
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I42d3d4ceeaf45788d457472f6ddcd3fe099f0133
diff --git a/plat/intel/soc/agilex/include/agilex_system_manager.h b/plat/intel/soc/agilex/include/agilex_system_manager.h
index 6ec2084..381c2d3 100644
--- a/plat/intel/soc/agilex/include/agilex_system_manager.h
+++ b/plat/intel/soc/agilex/include/agilex_system_manager.h
@@ -65,6 +65,11 @@
#define AGX_CCU_NOC_CPU0_RAMSPACE0_0 0xf7004688
#define AGX_CCU_NOC_IOM_RAMSPACE0_0 0xf7018628
+#define AGX_SYSMGR_CORE(x) (0xffd12000 + (x))
+#define SYSMGR_BOOT_SCRATCH_COLD_0 0x200
+#define SYSMGR_BOOT_SCRATCH_COLD_1 0x204
+#define SYSMGR_BOOT_SCRATCH_COLD_2 0x208
+
#define DISABLE_BRIDGE_FIREWALL 0x0ffe0101
#define DISABLE_L4_FIREWALL (BIT(0) | BIT(16) | BIT(24))