commit a7e0c53efcdca27712dccb7332f6a72550a04b8d
author Sandrine Bailleux <sandrine.bailleux@arm.com> Thu Apr 14 13:32:31 2016 +0100
committer Sandrine Bailleux <sandrine.bailleux@arm.com> Thu Apr 21 09:44:51 2016 +0100
tree 75145b1bc05af5e40dc3924f5c2658cf1acaf623
parent afa8a78235c2dcd625590866a59afc0865a15531

Add support for Cortex-A57 erratum 826974 workaround

Change-Id: I45641551474f4c58c638aff8c42c0ab9a8ec78b4

include/lib/cpus/aarch64/cortex_a57.h

diff --git a/include/lib/cpus/aarch64/cortex_a57.h b/include/lib/cpus/aarch64/cortex_a57.h
index c512129..7711e69 100644
--- a/include/lib/cpus/aarch64/cortex_a57.h
+++ b/include/lib/cpus/aarch64/cortex_a57.h
@@ -61,6 +61,7 @@
  ******************************************************************************/
 #define CPUACTLR_EL1			S3_1_C15_C2_0	/* Instruction def. */
 
+#define CPUACTLR_DIS_LOAD_PASS_DMB	(1 << 59)
 #define CPUACTLR_DIS_OVERREAD		(1 << 52)
 #define CPUACTLR_NO_ALLOC_WBWA		(1 << 49)
 #define CPUACTLR_DCC_AS_DCCI		(1 << 44)