Merge changes from topic "bug-fix" into integration

* changes:
  fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
  build(changelog): add new scope for nxp crypto
  fix(lx2): drop erratum A-009810
diff --git a/changelog.yaml b/changelog.yaml
index 64c935f..4d38e37 100644
--- a/changelog.yaml
+++ b/changelog.yaml
@@ -738,6 +738,9 @@
           - title: QSPI
             scope: nxp-qspi
 
+          - title: NXP Crypto
+            scope: nxp-crypto
+
       - title: Renesas
         scope: renesas-drivers
 
diff --git a/drivers/nxp/crypto/caam/src/jobdesc.c b/drivers/nxp/crypto/caam/src/jobdesc.c
index 9c235af..f559c4b 100644
--- a/drivers/nxp/crypto/caam/src/jobdesc.c
+++ b/drivers/nxp/crypto/caam/src/jobdesc.c
@@ -60,8 +60,8 @@
 #ifdef CONFIG_PHYS_64BIT
 	ptr_addr_t *ptr_addr = (ptr_addr_t *) last;
 
-	ptr_addr->m_halves.high = PHYS_ADDR_HI(ptr);
-	ptr_addr->m_halves.low = PHYS_ADDR_LO(ptr);
+	ptr_addr->high = PHYS_ADDR_HI(ptr);
+	ptr_addr->low = PHYS_ADDR_LO(ptr);
 #else
 	*last = ptr;
 #endif
diff --git a/include/drivers/nxp/crypto/caam/sec_hw_specific.h b/include/drivers/nxp/crypto/caam/sec_hw_specific.h
index a4fc022..9800793 100644
--- a/include/drivers/nxp/crypto/caam/sec_hw_specific.h
+++ b/include/drivers/nxp/crypto/caam/sec_hw_specific.h
@@ -187,9 +187,7 @@
 				((value) & JRINT_JRE)
 
  /* Macros for manipulating JR registers */
-typedef union {
-	uint64_t m_whole;
-	struct {
+typedef struct {
 #ifdef NXP_SEC_BE
 		uint32_t high;
 		uint32_t low;
@@ -197,7 +195,6 @@
 		uint32_t low;
 		uint32_t high;
 #endif
-	} m_halves;
 } ptr_addr_t;
 
 #if defined(CONFIG_PHYS_64BIT)
diff --git a/plat/nxp/soc-lx2160a/aarch64/lx2160a.S b/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
index 4679fc2..cc679f2 100644
--- a/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
+++ b/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
@@ -563,14 +563,6 @@
  */
 func _soc_sys_off
 
-	/* A-009810: LPM20 entry sequence might cause
-	 * spurious timeout reset request
-	 * workaround: MASK RESET REQ RPTOE
-	 */
-	ldr  x0, =NXP_RESET_ADDR
-	ldr  w1, =RSTRQMR_RPTOE_MASK
-	str  w1, [x0, #RST_RSTRQMR1_OFFSET]
-
 	/* disable sec, QBman, spi and qspi */
 	ldr  x2, =NXP_DCFG_ADDR
 	ldr  x0, =DCFG_DEVDISR1_OFFSET