fix(cpus): workaround for Cortex-X4 erratum 2740089
Cortex-X4 erratum 2740089 is a Cat B erratum that applies to
all revisions <=r0p1 and is fixed in r0p2. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2432808/latest
Change-Id: I1d0fa4dd383437044a4467591f65a4a8514cabdc
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index f1553b2..a8e8d61 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -826,6 +826,10 @@
feature is enabled and can assist the Kernel in the process of
mitigation of the erratum.
+- ``ERRATA_X4_2740089``: This applies errata 2740089 workaround to Cortex-X4
+ CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed
+ in r0p2.
+
For Cortex-A510, the following errata build flags are defined :
- ``ERRATA_A510_1922240``: This applies errata 1922240 workaround to