commit a7178ca645590e9cb4f835f64754ac380fa6c8ea
author Michal Simek <michal.simek@amd.com> Fri Aug 02 13:19:23 2024 +0200
committer Michal Simek <michal.simek@amd.com> Thu Sep 26 14:41:53 2024 +0200
tree cb3880b3173bc4fc1664dfcd848927d982ce7b10
parent 9708274755074cee776d0627485977ae047e754d

fix(xilinx): fix comment about MEM_BASE/SIZE

Comment is not showing correct macro name that's why fix it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I8bc38534309285af8a27ee43782e03e9d0470267

plat/amd/versal2/platform.mk

diff --git a/plat/amd/versal2/platform.mk b/plat/amd/versal2/platform.mk
index 1c977a3..3892fcb 100644
--- a/plat/amd/versal2/platform.mk
+++ b/plat/amd/versal2/platform.mk
@@ -32,7 +32,7 @@
     $(eval $(call add_define,MEM_BASE))
 
     ifndef MEM_SIZE
-        $(error "ATF_BASE defined without ATF_SIZE")
+        $(error "MEM_BASE defined without MEM_SIZE")
     endif
     $(eval $(call add_define,MEM_SIZE))
 
@@ -45,7 +45,7 @@
     $(eval $(call add_define,BL32_MEM_BASE))
 
     ifndef BL32_MEM_SIZE
-        $(error "BL32_BASE defined without BL32_SIZE")
+        $(error "BL32_MEM_BASE defined without BL32_MEM_SIZE")
     endif
     $(eval $(call add_define,BL32_MEM_SIZE))
 endif

plat/xilinx/versal/platform.mk

diff --git a/plat/xilinx/versal/platform.mk b/plat/xilinx/versal/platform.mk
index 6cc28e1..e65800e 100644
--- a/plat/xilinx/versal/platform.mk
+++ b/plat/xilinx/versal/platform.mk
@@ -22,7 +22,7 @@
     $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
 
     ifndef VERSAL_ATF_MEM_SIZE
-        $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE")
+        $(error "VERSAL_ATF_MEM_BASE defined without VERSAL_ATF_MEM_SIZE")
     endif
     $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
 
@@ -35,7 +35,7 @@
     $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
 
     ifndef VERSAL_BL32_MEM_SIZE
-        $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE")
+        $(error "VERSAL_BL32_MEM_BASE defined without VERSAL_BL32_MEM_SIZE")
     endif
     $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
 endif

plat/xilinx/versal_net/platform.mk

diff --git a/plat/xilinx/versal_net/platform.mk b/plat/xilinx/versal_net/platform.mk
index da91abc..40e9206 100644
--- a/plat/xilinx/versal_net/platform.mk
+++ b/plat/xilinx/versal_net/platform.mk
@@ -34,7 +34,7 @@
     $(eval $(call add_define,VERSAL_NET_ATF_MEM_BASE))
 
     ifndef VERSAL_NET_ATF_MEM_SIZE
-        $(error "VERSAL_NET_ATF_BASE defined without VERSAL_NET_ATF_SIZE")
+        $(error "VERSAL_NET_ATF_MEM_BASE defined without VERSAL_NET_ATF_MEM_SIZE")
     endif
     $(eval $(call add_define,VERSAL_NET_ATF_MEM_SIZE))
 
@@ -47,7 +47,7 @@
     $(eval $(call add_define,VERSAL_NET_BL32_MEM_BASE))
 
     ifndef VERSAL_NET_BL32_MEM_SIZE
-        $(error "VERSAL_NET_BL32_BASE defined without VERSAL_NET_BL32_SIZE")
+        $(error "VERSAL_NET_BL32_MEM_BASE defined without VERSAL_NET_BL32_MEM_SIZE")
     endif
     $(eval $(call add_define,VERSAL_NET_BL32_MEM_SIZE))
 endif

plat/xilinx/zynqmp/platform.mk

diff --git a/plat/xilinx/zynqmp/platform.mk b/plat/xilinx/zynqmp/platform.mk
index 22eceb6..9fdc649 100644
--- a/plat/xilinx/zynqmp/platform.mk
+++ b/plat/xilinx/zynqmp/platform.mk
@@ -39,7 +39,7 @@
     $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
 
     ifndef ZYNQMP_ATF_MEM_SIZE
-        $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE")
+        $(error "ZYNQMP_ATF_MEM_BASE defined without ZYNQMP_ATF_MEM_SIZE")
     endif
     $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
 
@@ -56,7 +56,7 @@
     $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
 
     ifndef ZYNQMP_BL32_MEM_SIZE
-        $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE")
+        $(error "ZYNQMP_BL32_MEM_BASE defined without ZYNQMP_BL32_MEM_SIZE")
     endif
     $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
 endif