TF-A GICv3 driver: Add extended PPI and SPI range
This patch provides support for GICv3.1 extended PPI and SPI
range. The option is enabled by setting to 1 and passing
`GIC_EXT_INTID` build flag to gicv3.mk makefile.
This option defaults to 0 with no extended range support.
Change-Id: I7d09086fe22ea531c5df51a8a1efd8928458d394
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
diff --git a/drivers/arm/gic/v3/gicrv3_helpers.c b/drivers/arm/gic/v3/gicrv3_helpers.c
index 294acda..e46b15e 100644
--- a/drivers/arm/gic/v3/gicrv3_helpers.c
+++ b/drivers/arm/gic/v3/gicrv3_helpers.c
@@ -13,203 +13,113 @@
/*******************************************************************************
* GIC Redistributor functions
- * Note: The raw register values correspond to multiple interrupt IDs and
- * the number of interrupt IDs involved depends on the register accessed.
+ * Note: The raw register values correspond to multiple interrupt `id`s and
+ * the number of interrupt `id`s involved depends on the register accessed.
******************************************************************************/
/*
- * Accessor to read the GIC Redistributor IPRIORITYR corresponding to the
- * interrupt `id`, 4 interrupts IDs at a time.
- */
-unsigned int gicr_read_ipriorityr(uintptr_t base, unsigned int id)
-{
- unsigned int n = id >> IPRIORITYR_SHIFT;
-
- return mmio_read_32(base + GICR_IPRIORITYR + (n << 2));
-}
-
-/*
- * Accessor to write the GIC Redistributor IPRIORITYR corresponding to the
- * interrupt `id`, 4 interrupts IDs at a time.
- */
-void gicr_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val)
-{
- unsigned int n = id >> IPRIORITYR_SHIFT;
-
- mmio_write_32(base + GICR_IPRIORITYR + (n << 2), val);
-}
-
-/*
- * Accessor to set the byte corresponding to interrupt ID
- * in GIC Redistributor IPRIORITYR.
+ * Accessor to set the byte corresponding to interrupt `id`
+ * in GIC Redistributor IPRIORITYR and IPRIORITYRE.
*/
void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri)
{
- GICR_WRITE_8(IPRIORITYR, base, id, pri & GIC_PRI_MASK);
+ GICR_WRITE_8(IPRIORITY, base, id, (uint8_t)(pri & GIC_PRI_MASK));
}
/*
- * Accessor to get the bit corresponding to interrupt ID
- * from GIC Redistributor IGROUPR0.
+ * Accessors to get/set/clear the bit corresponding to interrupt `id`
+ * from GIC Redistributor IGROUPR0 and IGROUPRE
*/
-unsigned int gicr_get_igroupr0(uintptr_t base, unsigned int id)
+unsigned int gicr_get_igroupr(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
- unsigned int reg_val = gicr_read_igroupr0(base);
-
- return (reg_val >> bit_num) & 0x1U;
+ return GICR_GET_BIT(IGROUP, base, id);
}
-/*
- * Accessor to set the bit corresponding to interrupt ID
- * in GIC Redistributor IGROUPR0.
- */
-void gicr_set_igroupr0(uintptr_t base, unsigned int id)
+void gicr_set_igroupr(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
- unsigned int reg_val = gicr_read_igroupr0(base);
-
- gicr_write_igroupr0(base, reg_val | (1U << bit_num));
+ GICR_SET_BIT(IGROUP, base, id);
}
-/*
- * Accessor to clear the bit corresponding to interrupt ID
- * in GIC Redistributor IGROUPR0.
- */
-void gicr_clr_igroupr0(uintptr_t base, unsigned int id)
+void gicr_clr_igroupr(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
- unsigned int reg_val = gicr_read_igroupr0(base);
-
- gicr_write_igroupr0(base, reg_val & ~(1U << bit_num));
+ GICR_CLR_BIT(IGROUP, base, id);
}
/*
- * Accessor to get the bit corresponding to interrupt ID
- * from GIC Redistributor IGRPMODR0.
+ * Accessors to get/set/clear the bit corresponding to interrupt `id`
+ * from GIC Redistributor IGRPMODR0 and IGRPMODRE
*/
-unsigned int gicr_get_igrpmodr0(uintptr_t base, unsigned int id)
+unsigned int gicr_get_igrpmodr(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
- unsigned int reg_val = gicr_read_igrpmodr0(base);
-
- return (reg_val >> bit_num) & 0x1U;
+ return GICR_GET_BIT(IGRPMOD, base, id);
}
-/*
- * Accessor to set the bit corresponding to interrupt ID
- * in GIC Redistributor IGRPMODR0.
- */
-void gicr_set_igrpmodr0(uintptr_t base, unsigned int id)
+void gicr_set_igrpmodr(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
- unsigned int reg_val = gicr_read_igrpmodr0(base);
-
- gicr_write_igrpmodr0(base, reg_val | (1U << bit_num));
+ GICR_SET_BIT(IGRPMOD, base, id);
}
-/*
- * Accessor to clear the bit corresponding to interrupt ID
- * in GIC Redistributor IGRPMODR0.
- */
-void gicr_clr_igrpmodr0(uintptr_t base, unsigned int id)
+void gicr_clr_igrpmodr(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
- unsigned int reg_val = gicr_read_igrpmodr0(base);
-
- gicr_write_igrpmodr0(base, reg_val & ~(1U << bit_num));
+ GICR_CLR_BIT(IGRPMOD, base, id);
}
/*
- * Accessor to set the bit corresponding to interrupt ID
- * in GIC Redistributor ISENABLER0.
+ * Accessor to write the bit corresponding to interrupt `id`
+ * in GIC Redistributor ISENABLER0 and ISENABLERE
*/
-void gicr_set_isenabler0(uintptr_t base, unsigned int id)
+void gicr_set_isenabler(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << ISENABLER_SHIFT) - 1U);
-
- gicr_write_isenabler0(base, (1U << bit_num));
+ GICR_WRITE_BIT(ISENABLE, base, id);
}
/*
- * Accessor to set the bit corresponding to interrupt ID in GIC Redistributor
- * ICENABLER0.
+ * Accessor to write the bit corresponding to interrupt `id`
+ * in GIC Redistributor ICENABLER0 and ICENABLERE
*/
-void gicr_set_icenabler0(uintptr_t base, unsigned int id)
+void gicr_set_icenabler(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << ICENABLER_SHIFT) - 1U);
-
- gicr_write_icenabler0(base, (1U << bit_num));
+ GICR_WRITE_BIT(ICENABLE, base, id);
}
/*
- * Accessor to set the bit corresponding to interrupt ID in GIC Redistributor
- * ISACTIVER0.
+ * Accessor to get the bit corresponding to interrupt `id`
+ * in GIC Redistributor ISACTIVER0 and ISACTIVERE
*/
-unsigned int gicr_get_isactiver0(uintptr_t base, unsigned int id)
+unsigned int gicr_get_isactiver(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << ISACTIVER_SHIFT) - 1U);
- unsigned int reg_val = gicr_read_isactiver0(base);
-
- return (reg_val >> bit_num) & 0x1U;
+ return GICR_GET_BIT(ISACTIVE, base, id);
}
/*
- * Accessor to clear the bit corresponding to interrupt ID in GIC Redistributor
- * ICPENDRR0.
+ * Accessor to clear the bit corresponding to interrupt `id`
+ * in GIC Redistributor ICPENDR0 and ICPENDRE
*/
-void gicr_set_icpendr0(uintptr_t base, unsigned int id)
+void gicr_set_icpendr(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << ICPENDR_SHIFT) - 1U);
-
- gicr_write_icpendr0(base, (1U << bit_num));
+ GICR_WRITE_BIT(ICPEND, base, id);
}
/*
- * Accessor to set the bit corresponding to interrupt ID in GIC Redistributor
- * ISPENDR0.
+ * Accessor to write the bit corresponding to interrupt `id`
+ * in GIC Redistributor ISPENDR0 and ISPENDRE
*/
-void gicr_set_ispendr0(uintptr_t base, unsigned int id)
+void gicr_set_ispendr(uintptr_t base, unsigned int id)
{
- unsigned int bit_num = id & ((1U << ISPENDR_SHIFT) - 1U);
-
- gicr_write_ispendr0(base, (1U << bit_num));
+ GICR_WRITE_BIT(ISPEND, base, id);
}
/*
- * Accessor to set the bit fields corresponding to interrupt ID
- * in GIC Redistributor ICFGR0.
+ * Accessor to set the bit fields corresponding to interrupt `id`
+ * in GIC Redistributor ICFGR0, ICFGR1 and ICFGRE
*/
-void gicr_set_icfgr0(uintptr_t base, unsigned int id, unsigned int cfg)
+void gicr_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg)
{
/* Interrupt configuration is a 2-bit field */
- unsigned int bit_num = id & ((1U << ICFGR_SHIFT) - 1U);
- unsigned int bit_shift = bit_num << 1U;
-
- uint32_t reg_val = gicr_read_icfgr0(base);
+ unsigned int bit_shift = BIT_NUM(ICFG, id) << 1U;
/* Clear the field, and insert required configuration */
- reg_val &= ~(GIC_CFG_MASK << bit_shift);
- reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift);
-
- gicr_write_icfgr0(base, reg_val);
-}
-
-/*
- * Accessor to set the bit fields corresponding to interrupt ID
- * in GIC Redistributor ICFGR1.
- */
-void gicr_set_icfgr1(uintptr_t base, unsigned int id, unsigned int cfg)
-{
- /* Interrupt configuration is a 2-bit field */
- unsigned int bit_num = id & ((1U << ICFGR_SHIFT) - 1U);
- unsigned int bit_shift = bit_num << 1U;
-
- uint32_t reg_val = gicr_read_icfgr1(base);
-
- /* Clear the field, and insert required configuration */
- reg_val &= ~(GIC_CFG_MASK << bit_shift);
- reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift);
-
- gicr_write_icfgr1(base, reg_val);
+ mmio_clrsetbits_32(base + GICR_OFFSET(ICFG, id),
+ (uint32_t)GIC_CFG_MASK << bit_shift,
+ (cfg & GIC_CFG_MASK) << bit_shift);
}