diff --git a/plat/mediatek/mt8192/aarch64/platform_common.c b/plat/mediatek/mt8192/aarch64/platform_common.c
index eb1bb44..ffa10fe 100644
--- a/plat/mediatek/mt8192/aarch64/platform_common.c
+++ b/plat/mediatek/mt8192/aarch64/platform_common.c
@@ -19,6 +19,8 @@
 			MT_DEVICE | MT_RW | MT_SECURE),
 	MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
 			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(MTK_MCDI_SRAM_BASE, MTK_MCDI_SRAM_MAP_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
 	{ 0 }
 };
 
diff --git a/plat/mediatek/mt8192/drivers/mcdi/mt_cpu_pm.c b/plat/mediatek/mt8192/drivers/mcdi/mt_cpu_pm.c
index d6d4af7..b483c36 100644
--- a/plat/mediatek/mt8192/drivers/mcdi/mt_cpu_pm.c
+++ b/plat/mediatek/mt8192/drivers/mcdi/mt_cpu_pm.c
@@ -12,6 +12,8 @@
 #include <lib/spinlock.h>
 
 #include <mt_cpu_pm_cpc.h>
+#include <mt_lp_irqremain.h>
+#include <mt_lp_rm.h>
 #include <mt_mcdi.h>
 #include <plat_mtk_lpm.h>
 #include <plat_pm.h>
@@ -73,27 +75,49 @@
 static int pwr_mcusys_pwron_finished(unsigned int cpu,
 					const psci_power_state_t *state)
 {
+	int state_id = state->pwr_domain_state[MTK_AFFLVL_MCUSYS];
+
 	if (!IS_MCUSYS_OFF_STATE(state) || (plat_mt_lp_cpu_rc < 0)) {
 		return -1;
 	}
 
+	mt_lp_rm_reset_constraint(plat_mt_lp_cpu_rc, cpu, state_id);
+	mt_lp_irqremain_release();
+
 	return 0;
 }
 
 static int pwr_mcusys_pwrdwn(unsigned int cpu, const psci_power_state_t *state)
 {
+	int state_id = state->pwr_domain_state[MTK_AFFLVL_MCUSYS];
+
 	if (!IS_MCUSYS_OFF_STATE(state)) {
 		goto mt_pwr_mcusysoff_break;
 	}
 
-	if (mcdi_try_init() != 0) { /* not ready to process mcusys-off */
+	if (mcdi_try_init() != 0) {
 		goto mt_pwr_mcusysoff_break;
 	}
 
+	if (mtk_cpc_mcusys_off_prepare() != CPC_SUCCESS) {
+		goto mt_pwr_mcusysoff_break;
+	}
+
+	plat_mt_lp_cpu_rc =
+		mt_lp_rm_find_and_run_constraint(0, cpu, state_id, NULL);
+
+	if (plat_mt_lp_cpu_rc < 0) {
+		goto mt_pwr_mcusysoff_reflect;
+	}
+
+	mt_lp_irqremain_aquire();
+
 	return 0;
 
-mt_pwr_mcusysoff_break:
+mt_pwr_mcusysoff_reflect:
+	mtk_cpc_mcusys_off_reflect();
 
+mt_pwr_mcusysoff_break:
 	plat_mt_lp_cpu_rc = -1;
 
 	return -1;
@@ -119,5 +143,7 @@
 		INFO("MCDI init done.\n");
 	}
 
+	mt_lp_irqremain_init();
+
 	return &plat_pm;
 }
diff --git a/plat/mediatek/mt8192/drivers/mcdi/mt_lp_irqremain.c b/plat/mediatek/mt8192/drivers/mcdi/mt_lp_irqremain.c
new file mode 100644
index 0000000..809518f
--- /dev/null
+++ b/plat/mediatek/mt8192/drivers/mcdi/mt_lp_irqremain.c
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2020, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <mt_lp_rm.h>
+#include <mt_lp_irqremain.h>
+#include <plat_mtk_lpm.h>
+#include <plat_mt_cirq.h>
+
+#define EDMA0_IRQ_ID		U(448)
+#define MDLA_IRQ_ID		U(446)
+#define MALI4_IRQ_ID		U(399)
+#define MALI3_IRQ_ID		U(398)
+#define MALI2_IRQ_ID		U(397)
+#define MALI1_IRQ_ID		U(396)
+#define MALI0_IRQ_ID		U(395)
+#define VPU_CORE1_IRQ_ID	U(453)
+#define VPU_CORE0_IRQ_ID	U(452)
+#define MD_WDT_IRQ_ID		U(110)
+#define KEYPAD_IRQ_ID		U(106)
+
+#define MD_WDT_WAKESRC		0x2000000
+#define KEYPAD_WAKESRC		0x4
+
+static struct mt_irqremain remain_irqs;
+
+int mt_lp_irqremain_submit(void)
+{
+	if (remain_irqs.count == 0) {
+		return -1;
+	}
+
+	set_wakeup_sources(remain_irqs.irqs, remain_irqs.count);
+	mt_lp_rm_do_update(-1, PLAT_RC_UPDATE_REMAIN_IRQS, &remain_irqs);
+
+	return 0;
+}
+
+int mt_lp_irqremain_aquire(void)
+{
+	if (remain_irqs.count == 0) {
+		return -1;
+	}
+
+	mt_cirq_sw_reset();
+	mt_cirq_clone_gic();
+	mt_cirq_enable();
+
+	return 0;
+}
+
+int mt_lp_irqremain_release(void)
+{
+	if (remain_irqs.count == 0) {
+		return -1;
+	}
+
+	mt_cirq_flush();
+	mt_cirq_disable();
+
+	return 0;
+}
+
+void mt_lp_irqremain_init(void)
+{
+	uint32_t idx;
+
+	remain_irqs.count = 0;
+
+	/* level edma0 */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = EDMA0_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* level mdla */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = MDLA_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* level mali4 */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = MALI4_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* level mali3 */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = MALI3_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* level mali2 */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = MALI2_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* level mali1 */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = MALI1_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* level mali0 */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = MALI0_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* level vpu core1 */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = VPU_CORE1_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* level vpu core0 */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = VPU_CORE0_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = 0;
+	remain_irqs.count++;
+
+	/* edge mdwdt */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = MD_WDT_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = MD_WDT_WAKESRC;
+	remain_irqs.count++;
+
+	/* edge keypad */
+	idx = remain_irqs.count;
+	remain_irqs.irqs[idx] = KEYPAD_IRQ_ID;
+	remain_irqs.wakeupsrc_cat[idx] = 0;
+	remain_irqs.wakeupsrc[idx] = KEYPAD_WAKESRC;
+	remain_irqs.count++;
+
+	mt_lp_irqremain_submit();
+}
diff --git a/plat/mediatek/mt8192/drivers/mcdi/mt_lp_irqremain.h b/plat/mediatek/mt8192/drivers/mcdi/mt_lp_irqremain.h
new file mode 100644
index 0000000..cbed967
--- /dev/null
+++ b/plat/mediatek/mt8192/drivers/mcdi/mt_lp_irqremain.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2020, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MT_LP_IRQREMAIN_H
+#define MT_LP_IRQREMAIN_H
+
+extern int mt_lp_irqremain_submit(void);
+extern int mt_lp_irqremain_aquire(void);
+extern int mt_lp_irqremain_release(void);
+extern void mt_lp_irqremain_init(void);
+#endif /* MT_LP_IRQREMAIN_H */
diff --git a/plat/mediatek/mt8192/drivers/mcdi/mt_mcdi.c b/plat/mediatek/mt8192/drivers/mcdi/mt_mcdi.c
index df74122..1635b67 100644
--- a/plat/mediatek/mt8192/drivers/mcdi/mt_mcdi.c
+++ b/plat/mediatek/mt8192/drivers/mcdi/mt_mcdi.c
@@ -5,6 +5,7 @@
  */
 
 #include <cdefs.h>
+#include <common/debug.h>
 
 #include <lib/mmio.h>
 #include <lib/utils_def.h>
@@ -144,5 +145,7 @@
 		mcdi_init_status = MCDI_INIT_DONE;
 	}
 
+	INFO("mcdi ready for mcusys-off-idle and system suspend\n");
+
 	return (mcdi_init_status == MCDI_INIT_DONE) ? 0 : mcdi_init_status;
 }
diff --git a/plat/mediatek/mt8192/include/plat_mtk_lpm.h b/plat/mediatek/mt8192/include/plat_mtk_lpm.h
index 8ba8b93..deaac97 100644
--- a/plat/mediatek/mt8192/include/plat_mtk_lpm.h
+++ b/plat/mediatek/mt8192/include/plat_mtk_lpm.h
@@ -10,7 +10,7 @@
 #include <lib/psci/psci.h>
 #include <lib/utils_def.h>
 
-#define MT_IRQ_REMAIN_MAX	U(8)
+#define MT_IRQ_REMAIN_MAX	U(32)
 #define MT_IRQ_REMAIN_CAT_LOG	BIT(31)
 
 struct mt_irqremain {
diff --git a/plat/mediatek/mt8192/plat_pm.c b/plat/mediatek/mt8192/plat_pm.c
index 6a74c02..6dfb6c9 100644
--- a/plat/mediatek/mt8192/plat_pm.c
+++ b/plat/mediatek/mt8192/plat_pm.c
@@ -87,11 +87,6 @@
 
 	coordinate_cluster_pwron();
 
-	/* Enable the GIC CPU interface */
-	gicv3_rdistif_on(cpu);
-	gicv3_cpuif_enable(cpu);
-	mt_gic_rdistif_init();
-
 	/*
 	 * If mcusys does power down before then restore
 	 * all CPUs' GIC Redistributors
@@ -99,6 +94,9 @@
 	if (IS_MCUSYS_OFF_STATE(state)) {
 		mt_gic_rdistif_restore_all();
 	} else {
+		gicv3_rdistif_on(cpu);
+		gicv3_cpuif_enable(cpu);
+		mt_gic_rdistif_init();
 		mt_gic_rdistif_restore();
 	}
 
diff --git a/plat/mediatek/mt8192/platform.mk b/plat/mediatek/mt8192/platform.mk
index 9c9b233..e4994e6 100644
--- a/plat/mediatek/mt8192/platform.mk
+++ b/plat/mediatek/mt8192/platform.mk
@@ -63,6 +63,7 @@
                    ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c                 \
                    ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c              \
                    ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c          \
+                   ${MTK_PLAT_SOC}/drivers/mcdi/mt_lp_irqremain.c        \
                    ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c                \
                    ${MTK_PLAT_SOC}/drivers/ptp3/mtk_ptp3_main.c          \
                    ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c                 \