diff --git a/bl1/aarch32/bl1_context_mgmt.c b/bl1/aarch32/bl1_context_mgmt.c
index b5a6a34..85d35a7 100644
--- a/bl1/aarch32/bl1_context_mgmt.c
+++ b/bl1/aarch32/bl1_context_mgmt.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -53,10 +53,10 @@
 	return &bl1_cpu_context[security_state];
 }
 
-void cm_set_next_context(void *cpu_context)
+void cm_set_next_context(void *context)
 {
-	assert(cpu_context);
-	bl1_next_cpu_context_ptr = cpu_context;
+	assert(context != NULL);
+	bl1_next_cpu_context_ptr = context;
 }
 
 void *cm_get_next_context(void)
@@ -103,21 +103,21 @@
 void bl1_prepare_next_image(unsigned int image_id)
 {
 	unsigned int security_state, mode = MODE32_svc;
-	image_desc_t *image_desc;
+	image_desc_t *desc;
 	entry_point_info_t *next_bl_ep;
 
 	/* Get the image descriptor. */
-	image_desc = bl1_plat_get_image_desc(image_id);
-	assert(image_desc);
+	desc = bl1_plat_get_image_desc(image_id);
+	assert(desc != NULL);
 
 	/* Get the entry point info. */
-	next_bl_ep = &image_desc->ep_info;
+	next_bl_ep = &desc->ep_info;
 
 	/* Get the image security state. */
 	security_state = GET_SECURITY_STATE(next_bl_ep->h.attr);
 
 	/* Prepare the SPSR for the next BL image. */
-	if ((security_state != SECURE) && (GET_VIRT_EXT(read_id_pfr1()))) {
+	if ((security_state != SECURE) && (GET_VIRT_EXT(read_id_pfr1()) != 0U)) {
 		mode = MODE32_hyp;
 	}
 
@@ -166,7 +166,7 @@
 	flush_smc_and_cpu_ctx();
 
 	/* Indicate that image is in execution state. */
-	image_desc->state = IMAGE_STATE_EXECUTED;
+	desc->state = IMAGE_STATE_EXECUTED;
 
 	print_entry_point_info(next_bl_ep);
 }