stm32mp1: make functions and macros more common
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions
that can be used in drivers shared by different platforms.
Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
diff --git a/drivers/st/ddr/stm32mp1_ram.c b/drivers/st/ddr/stm32mp1_ram.c
index e65fbea..532062e 100644
--- a/drivers/st/ddr/stm32mp1_ram.c
+++ b/drivers/st/ddr/stm32mp1_ram.c
@@ -31,7 +31,7 @@
ddr_enable_clock();
- ddrphy_clk = stm32mp1_clk_get_rate(DDRPHYC);
+ ddrphy_clk = stm32mp_clk_get_rate(DDRPHYC);
VERBOSE("DDR: mem_speed (%d kHz), RCC %ld kHz\n",
mem_speed, ddrphy_clk / 1000U);
@@ -65,10 +65,10 @@
uint32_t pattern;
for (pattern = 1U; pattern != 0U; pattern <<= 1) {
- mmio_write_32(STM32MP1_DDR_BASE, pattern);
+ mmio_write_32(STM32MP_DDR_BASE, pattern);
- if (mmio_read_32(STM32MP1_DDR_BASE) != pattern) {
- return (uint32_t)STM32MP1_DDR_BASE;
+ if (mmio_read_32(STM32MP_DDR_BASE) != pattern) {
+ return (uint32_t)STM32MP_DDR_BASE;
}
}
@@ -92,44 +92,44 @@
/* Write the default pattern at each of the power-of-two offsets. */
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1) {
- mmio_write_32(STM32MP1_DDR_BASE + (uint32_t)offset,
+ mmio_write_32(STM32MP_DDR_BASE + (uint32_t)offset,
DDR_PATTERN);
}
/* Check for address bits stuck high. */
- mmio_write_32(STM32MP1_DDR_BASE + (uint32_t)testoffset,
+ mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_ANTIPATTERN);
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1) {
- if (mmio_read_32(STM32MP1_DDR_BASE + (uint32_t)offset) !=
+ if (mmio_read_32(STM32MP_DDR_BASE + (uint32_t)offset) !=
DDR_PATTERN) {
- return (uint32_t)(STM32MP1_DDR_BASE + offset);
+ return (uint32_t)(STM32MP_DDR_BASE + offset);
}
}
- mmio_write_32(STM32MP1_DDR_BASE + (uint32_t)testoffset, DDR_PATTERN);
+ mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset, DDR_PATTERN);
/* Check for address bits stuck low or shorted. */
for (testoffset = sizeof(uint32_t); (testoffset & addressmask) != 0U;
testoffset <<= 1) {
- mmio_write_32(STM32MP1_DDR_BASE + (uint32_t)testoffset,
+ mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_ANTIPATTERN);
- if (mmio_read_32(STM32MP1_DDR_BASE) != DDR_PATTERN) {
- return STM32MP1_DDR_BASE;
+ if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
+ return STM32MP_DDR_BASE;
}
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1) {
- if ((mmio_read_32(STM32MP1_DDR_BASE +
+ if ((mmio_read_32(STM32MP_DDR_BASE +
(uint32_t)offset) != DDR_PATTERN) &&
(offset != testoffset)) {
- return (uint32_t)(STM32MP1_DDR_BASE + offset);
+ return (uint32_t)(STM32MP_DDR_BASE + offset);
}
}
- mmio_write_32(STM32MP1_DDR_BASE + (uint32_t)testoffset,
+ mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_PATTERN);
}
@@ -147,13 +147,13 @@
{
uint32_t offset = sizeof(uint32_t);
- mmio_write_32(STM32MP1_DDR_BASE, DDR_PATTERN);
+ mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN);
- while (offset < STM32MP1_DDR_MAX_SIZE) {
- mmio_write_32(STM32MP1_DDR_BASE + offset, DDR_ANTIPATTERN);
+ while (offset < STM32MP_DDR_MAX_SIZE) {
+ mmio_write_32(STM32MP_DDR_BASE + offset, DDR_ANTIPATTERN);
dsb();
- if (mmio_read_32(STM32MP1_DDR_BASE) != DDR_PATTERN) {
+ if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
break;
}
@@ -240,15 +240,15 @@
}
}
- if (!stm32mp1_clk_is_enabled(RTCAPB)) {
+ if (!stm32mp_clk_is_enabled(RTCAPB)) {
tamp_clk_off = 1;
- if (stm32mp1_clk_enable(RTCAPB) != 0) {
+ if (stm32mp_clk_enable(RTCAPB) != 0) {
return -EINVAL;
}
}
if (tamp_clk_off != 0U) {
- if (stm32mp1_clk_disable(RTCAPB) != 0) {
+ if (stm32mp_clk_disable(RTCAPB) != 0) {
return -EINVAL;
}
}
@@ -306,7 +306,7 @@
priv->pwr = PWR_BASE;
priv->rcc = RCC_BASE;
- priv->info.base = STM32MP1_DDR_BASE;
+ priv->info.base = STM32MP_DDR_BASE;
priv->info.size = 0;
return stm32mp1_ddr_setup();