diff --git a/Makefile b/Makefile
index 0d62dd7..8cba50c 100644
--- a/Makefile
+++ b/Makefile
@@ -74,11 +74,19 @@
 # Verbose flag
 ifeq (${V},0)
         Q:=@
+        ECHO:=@echo
         CHECKCODE_ARGS	+=	--no-summary --terse
 else
         Q:=
+        ECHO:=@\#
+endif
+
+ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),)
+        Q:=@
+        ECHO:=@\#
 endif
-export Q
+
+export Q ECHO
 
 # Process Debug flag
 $(eval $(call add_define,DEBUG))
diff --git a/drivers/arm/pl011/aarch32/pl011_console.S b/drivers/arm/pl011/aarch32/pl011_console.S
index b7892e1..841ea44 100644
--- a/drivers/arm/pl011/aarch32/pl011_console.S
+++ b/drivers/arm/pl011/aarch32/pl011_console.S
@@ -89,8 +89,9 @@
 	.globl console_pl011_register
 
 	/* -------------------------------------------------------
-	 * init console_pl011_register(console_pl011_t *console,
-	 *	uintptr_t base, uint32_t clk, uint32_t baud)
+	 * int console_pl011_register(uintptr_t baseaddr,
+	 *     uint32_t clock, uint32_t baud,
+	 *     console_pl011_t *console);
 	 * Function to initialize and register a new PL011
 	 * console. Storage passed in for the console struct
 	 * *must* be persistent (i.e. not from the stack).
diff --git a/drivers/arm/pl011/aarch64/pl011_console.S b/drivers/arm/pl011/aarch64/pl011_console.S
index 448501a..d6a2d6b 100644
--- a/drivers/arm/pl011/aarch64/pl011_console.S
+++ b/drivers/arm/pl011/aarch64/pl011_console.S
@@ -85,8 +85,9 @@
 	.globl console_pl011_register
 
 	/* -----------------------------------------------
-	 * int console_pl011_register(console_pl011_t *console,
-		uintptr_t base, uint32_t clk, uint32_t baud)
+	 * int console_pl011_register(uintptr_t baseaddr,
+	 *     uint32_t clock, uint32_t baud,
+	 *     console_pl011_t *console);
 	 * Function to initialize and register a new PL011
 	 * console. Storage passed in for the console struct
 	 * *must* be persistent (i.e. not from the stack).
diff --git a/drivers/cadence/uart/aarch64/cdns_console.S b/drivers/cadence/uart/aarch64/cdns_console.S
index 6732631..71359a6 100644
--- a/drivers/cadence/uart/aarch64/cdns_console.S
+++ b/drivers/cadence/uart/aarch64/cdns_console.S
@@ -54,8 +54,9 @@
 	.globl console_cdns_register
 
 	/* -----------------------------------------------
-	 * int console_cdns_register(console_cdns_t *console,
-		uintptr_t base, uint32_t clk, uint32_t baud)
+	 * int console_cdns_register(uint64_t baseaddr,
+	 *     uint32_t clock, uint32_t baud,
+	 *     console_cdns_t *console);
 	 * Function to initialize and register a new CDNS
 	 * console. Storage passed in for the console struct
 	 * *must* be persistent (i.e. not from the stack).
diff --git a/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S b/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
index 2fc0603..184853d 100644
--- a/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
+++ b/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
@@ -19,8 +19,8 @@
 	.globl console_cbmc_flush
 
 	/* -----------------------------------------------
-	 * int console_cbmc_register(console_cbmc_t *console,
-	 *			     uintptr_t base)
+	 * int console_cbmc_register(uintptr_t base,
+	 *                           console_cbmc_t *console);
 	 * Registers a new CBMEM console instance. Reads
 	 * the size field from the buffer header structure
 	 * and stores it in our console_cbmc_t struct, so
diff --git a/drivers/imx/usdhc/imx_usdhc.c b/drivers/imx/usdhc/imx_usdhc.c
index ea96833..1f9550e 100644
--- a/drivers/imx/usdhc/imx_usdhc.c
+++ b/drivers/imx/usdhc/imx_usdhc.c
@@ -160,7 +160,7 @@
 		mixctl |= MIXCTRL_DMAEN;
 	}
 
-	if (cmd->resp_type & MMC_RSP_48)
+	if (cmd->resp_type & MMC_RSP_48 && cmd->resp_type != MMC_RESPONSE_R2)
 		xfertype |= XFERTYPE_RSPTYP_48;
 	else if (cmd->resp_type & MMC_RSP_136)
 		xfertype |= XFERTYPE_RSPTYP_136;
diff --git a/drivers/partition/partition.c b/drivers/partition/partition.c
index d6fb4b8..6085b86 100644
--- a/drivers/partition/partition.c
+++ b/drivers/partition/partition.c
@@ -30,7 +30,7 @@
 			name[len + j] = ' ';
 		}
 		name[EFI_NAMELEN - 1] = '\0';
-		VERBOSE("%d: %s %lx-%lx\n", i + 1, name, list.list[i].start,
+		VERBOSE("%d: %s %llx-%llx\n", i + 1, name, list.list[i].start,
 			list.list[i].start + list.list[i].length - 4);
 	}
 }
diff --git a/drivers/ti/uart/aarch64/16550_console.S b/drivers/ti/uart/aarch64/16550_console.S
index d46fa61..0f9a9d5 100644
--- a/drivers/ti/uart/aarch64/16550_console.S
+++ b/drivers/ti/uart/aarch64/16550_console.S
@@ -87,8 +87,9 @@
 	.globl console_16550_register
 
 	/* -----------------------------------------------
-	 * int console_16550_register(console_16550_t *console,
-		uintptr_t base, uint32_t clk, uint32_t baud)
+	 * int console_16550_register(uintptr_t baseaddr,
+	 *     uint32_t clock, uint32_t baud,
+	 *     console_16550_t *console);
 	 * Function to initialize and register a new 16550
 	 * console. Storage passed in for the console struct
 	 * *must* be persistent (i.e. not from the stack).
diff --git a/include/common/interrupt_props.h b/include/common/interrupt_props.h
index 9786b40..4ac698d 100644
--- a/include/common/interrupt_props.h
+++ b/include/common/interrupt_props.h
@@ -12,10 +12,10 @@
 /* Create an interrupt property descriptor from various interrupt properties */
 #define INTR_PROP_DESC(num, pri, grp, cfg) \
 	{ \
-		.intr_num = num, \
-		.intr_pri = pri, \
-		.intr_grp = grp, \
-		.intr_cfg = cfg, \
+		.intr_num = (num), \
+		.intr_pri = (pri), \
+		.intr_grp = (grp), \
+		.intr_cfg = (cfg), \
 	}
 
 typedef struct interrupt_prop {
diff --git a/include/drivers/arm/tzc_common.h b/include/drivers/arm/tzc_common.h
index 9411b73..bb64b00 100644
--- a/include/drivers/arm/tzc_common.h
+++ b/include/drivers/arm/tzc_common.h
@@ -46,10 +46,10 @@
 
 /* Macros for allowing Non-Secure access to a region based on NSAID */
 #define TZC_REGION_ACCESS_RD(nsaid)				\
-	((1 << (nsaid & TZC_REGION_ACCESS_ID_MASK)) <<		\
+	((1 << ((nsaid) & TZC_REGION_ACCESS_ID_MASK)) <<	\
 	 TZC_REGION_ACCESS_RD_EN_SHIFT)
 #define TZC_REGION_ACCESS_WR(nsaid)				\
-	((1 << (nsaid & TZC_REGION_ACCESS_ID_MASK)) <<		\
+	((1 << ((nsaid) & TZC_REGION_ACCESS_ID_MASK)) <<	\
 	 TZC_REGION_ACCESS_WR_EN_SHIFT)
 #define TZC_REGION_ACCESS_RDWR(nsaid)				\
 	(TZC_REGION_ACCESS_RD(nsaid) |				\
diff --git a/include/lib/object_pool.h b/include/lib/object_pool.h
new file mode 100644
index 0000000..7d40b41
--- /dev/null
+++ b/include/lib/object_pool.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef OBJECT_POOL_H
+#define OBJECT_POOL_H
+
+#include <debug.h>
+#include <stdlib.h>
+#include <utils_def.h>
+
+/*
+ * Pool of statically allocated objects.
+ *
+ * Objects can be reserved but not freed. This is by design and it is not a
+ * limitation. We do not want to introduce complexity induced by memory freeing,
+ * such as use-after-free bugs, memory fragmentation and so on.
+ *
+ * The object size and capacity of the pool are fixed at build time. So is the
+ * address of the objects back store.
+ */
+struct object_pool {
+	/* Size of 1 object in the pool in byte unit. */
+	const size_t obj_size;
+
+	/* Number of objects in the pool. */
+	const size_t capacity;
+
+	/* Objects back store. */
+	void *const objects;
+
+	/* How many objects are currently allocated. */
+	size_t used;
+};
+
+/* Create a static pool of objects. */
+#define OBJECT_POOL(_pool_name, _obj_backstore, _obj_size, _obj_count)	\
+	struct object_pool _pool_name = {				\
+		.objects = (_obj_backstore),				\
+		.obj_size = (_obj_size),				\
+		.capacity = (_obj_count),				\
+		.used = 0U,						\
+	}
+
+/* Create a static pool of objects out of an array of pre-allocated objects. */
+#define OBJECT_POOL_ARRAY(_pool_name, _obj_array)			\
+	OBJECT_POOL(_pool_name, (_obj_array),				\
+		    sizeof((_obj_array)[0]), ARRAY_SIZE(_obj_array))
+
+/*
+ * Allocate 'count' objects from a pool.
+ * Return the address of the first object. Panic on error.
+ */
+static inline void *pool_alloc_n(struct object_pool *pool, size_t count)
+{
+	if (pool->used + count > pool->capacity) {
+		ERROR("Cannot allocate %zu objects out of pool (%zu objects left).\n",
+		      count, pool->capacity - pool->used);
+		panic();
+	}
+
+	void *obj = (char *)(pool->objects) + pool->obj_size * pool->used;
+	pool->used += count;
+	return obj;
+}
+
+/*
+ * Allocate 1 object from a pool.
+ * Return the address of the object. Panic on error.
+ */
+static inline void *pool_alloc(struct object_pool *pool)
+{
+	return pool_alloc_n(pool, 1U);
+}
+
+#endif /* OBJECT_POOL_H */
diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h
deleted file mode 100644
index a927208..0000000
--- a/include/plat/arm/board/common/board_arm_def.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#ifndef __BOARD_ARM_DEF_H__
-#define __BOARD_ARM_DEF_H__
-
-#include <v2m_def.h>
-
-/*
- * Required platform porting definitions common to all ARM
- * development platforms
- */
-
-/* Size of cacheable stacks */
-#if defined(IMAGE_BL1)
-#if TRUSTED_BOARD_BOOT
-# define PLATFORM_STACK_SIZE 0x1000
-#else
-# define PLATFORM_STACK_SIZE 0x440
-#endif
-#elif defined(IMAGE_BL2)
-# if TRUSTED_BOARD_BOOT
-#  define PLATFORM_STACK_SIZE 0x1000
-# else
-#  define PLATFORM_STACK_SIZE 0x400
-# endif
-#elif defined(IMAGE_BL2U)
-# define PLATFORM_STACK_SIZE 0x400
-#elif defined(IMAGE_BL31)
-#if ENABLE_SPM
-# define PLATFORM_STACK_SIZE 0x500
-#elif PLAT_XLAT_TABLES_DYNAMIC
-# define PLATFORM_STACK_SIZE 0x800
-#else
-# define PLATFORM_STACK_SIZE 0x400
-#endif
-#elif defined(IMAGE_BL32)
-# define PLATFORM_STACK_SIZE 0x440
-#endif
-
-#define MAX_IO_DEVICES			3
-#define MAX_IO_HANDLES			4
-
-#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
-
-/* Reserve the last block of flash for PSCI MEM PROTECT flag */
-#define PLAT_ARM_FIP_BASE		V2M_FLASH0_BASE
-#define PLAT_ARM_FIP_MAX_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
-
-#define PLAT_ARM_NVM_BASE		V2M_FLASH0_BASE
-#define PLAT_ARM_NVM_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
-
-/*
- * Map mem_protect flash region with read and write permissions
- */
-#define ARM_V2M_MAP_MEM_PROTECT		MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR,	\
-						V2M_FLASH_BLOCK_SIZE,		\
-						MT_DEVICE | MT_RW | MT_SECURE)
-
-#endif /* __BOARD_ARM_DEF_H__ */
diff --git a/include/plat/arm/board/common/board_css_def.h b/include/plat/arm/board/common/board_css_def.h
index b0a6baf..1a80e16 100644
--- a/include/plat/arm/board/common/board_css_def.h
+++ b/include/plat/arm/board/common/board_css_def.h
@@ -40,6 +40,16 @@
 #endif /* __ASSEMBLY__ */
 
 
+#define MAX_IO_DEVICES			3
+#define MAX_IO_HANDLES			4
+
+/* Reserve the last block of flash for PSCI MEM PROTECT flag */
+#define PLAT_ARM_FIP_BASE		V2M_FLASH0_BASE
+#define PLAT_ARM_FIP_MAX_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
+#define PLAT_ARM_NVM_BASE		V2M_FLASH0_BASE
+#define PLAT_ARM_NVM_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
 /*
  * Required platform porting definitions common to all ARM CSS-based
  * development platforms
@@ -63,6 +73,5 @@
 #define PLAT_ARM_TSP_UART_BASE			V2M_IOFPGA_UART0_BASE
 #define PLAT_ARM_TSP_UART_CLK_IN_HZ		V2M_IOFPGA_UART0_CLK_IN_HZ
 
-
 #endif /* __BOARD_CSS_DEF_H__ */
 
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index 8d81af9..d5f5c15 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -277,6 +277,13 @@
 #endif
 
 /*
+ * Map mem_protect flash region with read and write permissions
+ */
+#define ARM_V2M_MAP_MEM_PROTECT		MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR,	\
+						V2M_FLASH_BLOCK_SIZE,		\
+						MT_DEVICE | MT_RW | MT_SECURE)
+
+/*
  * The max number of regions like RO(code), coherent and data required by
  * different BL stages which need to be mapped in the MMU.
  */
diff --git a/lib/psci/psci_common.c b/lib/psci/psci_common.c
index adce843..97aeb83 100644
--- a/lib/psci/psci_common.c
+++ b/lib/psci/psci_common.c
@@ -267,7 +267,7 @@
 static plat_local_state_t get_non_cpu_pd_node_local_state(
 		unsigned int parent_idx)
 {
-#if !(USE_COHERENT_MEM || HW_ASSISTED_COHERENCY)
+#if !(USE_COHERENT_MEM || HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
 	flush_dcache_range(
 			(uintptr_t) &psci_non_cpu_pd_nodes[parent_idx],
 			sizeof(psci_non_cpu_pd_nodes[parent_idx]));
@@ -283,7 +283,7 @@
 		plat_local_state_t state)
 {
 	psci_non_cpu_pd_nodes[parent_idx].local_state = state;
-#if !(USE_COHERENT_MEM || HW_ASSISTED_COHERENCY)
+#if !(USE_COHERENT_MEM || HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
 	flush_dcache_range(
 			(uintptr_t) &psci_non_cpu_pd_nodes[parent_idx],
 			sizeof(psci_non_cpu_pd_nodes[parent_idx]));
@@ -948,21 +948,18 @@
 	/*
 	 * With hardware-assisted coherency, the CPU drivers only initiate the
 	 * power down sequence, without performing cache-maintenance operations
-	 * in software. Data caches and MMU remain enabled both before and after
-	 * this call.
+	 * in software. Data caches enabled both before and after this call.
 	 */
 	prepare_cpu_pwr_dwn(power_level);
 #else
 	/*
 	 * Without hardware-assisted coherency, the CPU drivers disable data
-	 * caches and MMU, then perform cache-maintenance operations in
-	 * software.
+	 * caches, then perform cache-maintenance operations in software.
 	 *
-	 * We ought to call prepare_cpu_pwr_dwn() to initiate power down
-	 * sequence. We currently have data caches and MMU enabled, but the
-	 * function will return with data caches and MMU disabled. We must
-	 * ensure that the stack memory is flushed out to memory before we start
-	 * popping from it again.
+	 * This also calls prepare_cpu_pwr_dwn() to initiate power down
+	 * sequence, but that function will return with data caches disabled.
+	 * We must ensure that the stack memory is flushed out to memory before
+	 * we start popping from it again.
 	 */
 	psci_do_pwrdown_cache_maintenance(power_level);
 #endif
diff --git a/make_helpers/build_macros.mk b/make_helpers/build_macros.mk
index 28ce2a4..e186fc1 100644
--- a/make_helpers/build_macros.mk
+++ b/make_helpers/build_macros.mk
@@ -177,7 +177,7 @@
 # GZIP
 define GZIP_RULE
 $(1): $(2)
-	@echo "  GZIP    $$@"
+	$(ECHO) "  GZIP    $$@"
 	$(Q)gzip -n -f -9 $$< --stdout > $$@
 endef
 
@@ -199,7 +199,7 @@
 $(eval DEP := $(patsubst %.o,%.d,$(OBJ)))
 
 $(OBJ): $(2) $(filter-out %.d,$(MAKEFILE_LIST)) | lib$(3)_dirs
-	@echo "  CC      $$<"
+	$$(ECHO) "  CC      $$<"
 	$$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) $(MAKE_DEP) -c $$< -o $$@
 
 -include $(DEP)
@@ -218,7 +218,7 @@
 $(eval IMAGE := IMAGE_BL$(call uppercase,$(3)))
 
 $(OBJ): $(2) $(filter-out %.d,$(MAKEFILE_LIST)) | bl$(3)_dirs
-	@echo "  CC      $$<"
+	$$(ECHO) "  CC      $$<"
 	$$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) $(MAKE_DEP) -c $$< -o $$@
 
 -include $(DEP)
@@ -237,7 +237,7 @@
 $(eval IMAGE := IMAGE_BL$(call uppercase,$(3)))
 
 $(OBJ): $(2) $(filter-out %.d,$(MAKEFILE_LIST)) | bl$(3)_dirs
-	@echo "  AS      $$<"
+	$$(ECHO) "  AS      $$<"
 	$$(Q)$$(AS) $$(ASFLAGS) -D$(IMAGE) $(MAKE_DEP) -c $$< -o $$@
 
 -include $(DEP)
@@ -255,7 +255,7 @@
 $(eval IMAGE := IMAGE_BL$(call uppercase,$(3)))
 
 $(1): $(2) $(filter-out %.d,$(MAKEFILE_LIST)) | bl$(3)_dirs
-	@echo "  PP      $$<"
+	$$(ECHO) "  PP      $$<"
 	$$(Q)$$(CPP) $$(CPPFLAGS) -P -D__ASSEMBLY__ -D__LINKER__ $(MAKE_DEP) -D$(IMAGE) -o $$@ $$<
 
 -include $(DEP)
@@ -344,7 +344,7 @@
 all: ${LIB_DIR}/lib$(1).a
 
 ${LIB_DIR}/lib$(1).a: $(OBJS)
-	@echo "  AR      $$@"
+	$$(ECHO) "  AR      $$@"
 	$$(Q)$$(AR) cr $$@ $$?
 endef
 
@@ -392,7 +392,7 @@
 endif
 
 $(ELF): $(OBJS) $(LINKERFILE) | bl$(1)_dirs libraries $(BL_LIBS)
-	@echo "  LD      $$@"
+	$$(ECHO) "  LD      $$@"
 ifdef MAKE_BUILD_STRINGS
 	$(call MAKE_BUILD_STRINGS, $(BUILD_DIR)/build_message.o)
 else
@@ -405,11 +405,11 @@
 		$(OBJS) $(LDPATHS) $(LDLIBS) $(BL_LIBS)
 
 $(DUMP): $(ELF)
-	@echo "  OD      $$@"
+	$${ECHO} "  OD      $$@"
 	$${Q}$${OD} -dx $$< > $$@
 
 $(BIN): $(ELF)
-	@echo "  BIN     $$@"
+	$${ECHO} "  BIN     $$@"
 	$$(Q)$$(OC) -O binary $$< $$@
 	@${ECHO_BLANK_LINE}
 	@echo "Built $$@ successfully"
@@ -461,10 +461,10 @@
 $(eval DTBDEP := $(patsubst %.dtb,%.d,$(DOBJ)))
 
 $(DOBJ): $(2) $(filter-out %.d,$(MAKEFILE_LIST)) | fdt_dirs
-	@echo "  CPP     $$<"
+	$${ECHO} "  CPP     $$<"
 	$(eval DTBS       := $(addprefix $(1)/,$(call SOURCES_TO_DTBS,$(2))))
 	$$(Q)$$(CPP) $$(CPPFLAGS) -x assembler-with-cpp -MT $(DTBS) -MMD -MF $(DTSDEP) -o $(DPRE) $$<
-	@echo "  DTC     $$<"
+	$${ECHO} "  DTC     $$<"
 	$$(Q)$$(DTC) $$(DTC_FLAGS) -i fdts -d $(DTBDEP) -o $$@ $(DPRE)
 
 -include $(DTBDEP)
diff --git a/plat/arm/board/common/board_css.mk b/plat/arm/board/common/board_css.mk
deleted file mode 100644
index 5ac213a..0000000
--- a/plat/arm/board/common/board_css.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-3-Clause
-#
-
-PLAT_BL_COMMON_SOURCES	+=	plat/arm/board/common/board_css_common.c
-
-include plat/arm/board/common/board_common.mk
diff --git a/plat/arm/board/fvp/fvp_security.c b/plat/arm/board/fvp/fvp_security.c
index a6c9227..028522c 100644
--- a/plat/arm/board/fvp/fvp_security.c
+++ b/plat/arm/board/fvp/fvp_security.c
@@ -21,6 +21,6 @@
 	 * configurations, those would be configured here.
 	 */
 
-	if (get_arm_config()->flags & ARM_CONFIG_HAS_TZC)
+	if ((get_arm_config()->flags & ARM_CONFIG_HAS_TZC) != 0U)
 		arm_tzc400_setup(NULL);
 }
diff --git a/plat/arm/board/fvp/fvp_topology.c b/plat/arm/board/fvp/fvp_topology.c
index a1e3f7f..e21b9d2 100644
--- a/plat/arm/board/fvp/fvp_topology.c
+++ b/plat/arm/board/fvp/fvp_topology.c
@@ -16,7 +16,8 @@
 static unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 2];
 
 
-CASSERT(FVP_CLUSTER_COUNT && FVP_CLUSTER_COUNT <= 256, assert_invalid_fvp_cluster_count);
+CASSERT(((FVP_CLUSTER_COUNT > 0) && (FVP_CLUSTER_COUNT <= 256)),
+			assert_invalid_fvp_cluster_count);
 
 /*******************************************************************************
  * This function dynamically constructs the topology according to
@@ -24,7 +25,7 @@
  ******************************************************************************/
 const unsigned char *plat_get_power_domain_tree_desc(void)
 {
-	unsigned int i;
+	int i;
 
 	/*
 	 * The highest level is the system level. The next level is constituted
@@ -60,7 +61,7 @@
 	unsigned int clus_id, cpu_id, thread_id;
 
 	/* Validate affinity fields */
-	if (arm_config.flags & ARM_CONFIG_FVP_SHIFTED_AFF) {
+	if ((arm_config.flags & ARM_CONFIG_FVP_SHIFTED_AFF) != 0U) {
 		thread_id = MPIDR_AFFLVL0_VAL(mpidr);
 		cpu_id = MPIDR_AFFLVL1_VAL(mpidr);
 		clus_id = MPIDR_AFFLVL2_VAL(mpidr);
@@ -90,5 +91,5 @@
 	 * bit set.
 	 */
 	mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK);
-	return plat_arm_calc_core_pos(mpidr);
+	return (int) plat_arm_calc_core_pos(mpidr);
 }
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h
index e4df227..ed1a302 100644
--- a/plat/arm/board/fvp/include/platform_def.h
+++ b/plat/arm/board/fvp/include/platform_def.h
@@ -20,7 +20,6 @@
 
 #include <arm_def.h>
 #include <arm_spm_def.h>
-#include <board_arm_def.h>
 #include <common_def.h>
 #include <tzc400.h>
 #include <utils_def.h>
@@ -45,6 +44,8 @@
  */
 #define PLAT_ARM_CLUSTER_COUNT		FVP_CLUSTER_COUNT
 
+#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
+
 #define PLAT_ARM_TRUSTED_ROM_BASE	0x00000000
 #define PLAT_ARM_TRUSTED_ROM_SIZE	0x04000000	/* 64 MB */
 
@@ -52,7 +53,7 @@
 #define PLAT_ARM_TRUSTED_DRAM_SIZE	0x02000000	/* 32 MB */
 
 /* virtual address used by dynamic mem_protect for chunk_base */
-#define PLAT_ARM_MEM_PROTEC_VA_FRAME	0xc0000000
+#define PLAT_ARM_MEM_PROTEC_VA_FRAME	UL(0xc0000000)
 
 /* No SCP in FVP */
 #define PLAT_ARM_SCP_TZC_DRAM1_SIZE	ULL(0x0)
@@ -133,6 +134,45 @@
 # define PLAT_ARM_MAX_BL32_SIZE		0x3B000
 #endif
 
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if ENABLE_SPM
+#  define PLATFORM_STACK_SIZE 0x500
+# elif PLAT_XLAT_TABLES_DYNAMIC
+#  define PLATFORM_STACK_SIZE 0x800
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
+#define MAX_IO_DEVICES			3
+#define MAX_IO_HANDLES			4
+
+/* Reserve the last block of flash for PSCI MEM PROTECT flag */
+#define PLAT_ARM_FIP_BASE		V2M_FLASH0_BASE
+#define PLAT_ARM_FIP_MAX_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
+#define PLAT_ARM_NVM_BASE		V2M_FLASH0_BASE
+#define PLAT_ARM_NVM_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
 /*
  * PL011 related constants
  */
@@ -215,9 +255,9 @@
  */
 #define PLAT_ARM_G1S_IRQ_PROPS(grp) \
 	ARM_G1S_IRQ_PROPS(grp), \
-	INTR_PROP_DESC(FVP_IRQ_TZ_WDOG, GIC_HIGHEST_SEC_PRIORITY, grp, \
+	INTR_PROP_DESC(FVP_IRQ_TZ_WDOG, GIC_HIGHEST_SEC_PRIORITY, (grp), \
 			GIC_INTR_CFG_LEVEL), \
-	INTR_PROP_DESC(FVP_IRQ_SEC_SYS_TIMER, GIC_HIGHEST_SEC_PRIORITY, grp, \
+	INTR_PROP_DESC(FVP_IRQ_SEC_SYS_TIMER, GIC_HIGHEST_SEC_PRIORITY, (grp), \
 			GIC_INTR_CFG_LEVEL)
 
 #define PLAT_ARM_G0_IRQ_PROPS(grp)	ARM_G0_IRQ_PROPS(grp)
diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h
index d130beb..0e5c6d9 100644
--- a/plat/arm/board/juno/include/platform_def.h
+++ b/plat/arm/board/juno/include/platform_def.h
@@ -20,7 +20,6 @@
 
 
 #include <arm_def.h>
-#include <board_arm_def.h>
 #include <board_css_def.h>
 #include <common_def.h>
 #include <css_def.h>
@@ -53,6 +52,8 @@
  */
 #define PLAT_ARM_CLUSTER_COUNT		JUNO_CLUSTER_COUNT
 
+#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
+
 /* Use the bypass address */
 #define PLAT_ARM_TRUSTED_ROM_BASE	V2M_FLASH0_BASE + BL1_ROM_BYPASS_OFFSET
 
@@ -60,7 +61,7 @@
 #define NSRAM_SIZE			0x00008000	/* 32KB */
 
 /* virtual address used by dynamic mem_protect for chunk_base */
-#define PLAT_ARM_MEM_PROTEC_VA_FRAME	0xc0000000
+#define PLAT_ARM_MEM_PROTEC_VA_FRAME	UL(0xc0000000)
 
 /*
  * Actual ROM size on Juno is 64 KB, but TBB currently requires at least 80 KB
@@ -163,6 +164,33 @@
 #endif
 
 /*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if PLAT_XLAT_TABLES_DYNAMIC
+#  define PLATFORM_STACK_SIZE 0x800
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
+/*
  * Since free SRAM space is scant, enable the ASSERTION message size
  * optimization by fixing the PLAT_LOG_LEVEL_ASSERT to LOG_LEVEL_INFO (40).
  */
@@ -236,21 +264,21 @@
 	CSS_G1S_IRQ_PROPS(grp), \
 	ARM_G1S_IRQ_PROPS(grp), \
 	INTR_PROP_DESC(JUNO_IRQ_DMA_SMMU, GIC_HIGHEST_SEC_PRIORITY, \
-		grp, GIC_INTR_CFG_LEVEL), \
+		(grp), GIC_INTR_CFG_LEVEL), \
 	INTR_PROP_DESC(JUNO_IRQ_HDLCD0_SMMU, GIC_HIGHEST_SEC_PRIORITY, \
-		grp, GIC_INTR_CFG_LEVEL), \
+		(grp), GIC_INTR_CFG_LEVEL), \
 	INTR_PROP_DESC(JUNO_IRQ_HDLCD1_SMMU, GIC_HIGHEST_SEC_PRIORITY, \
-		grp, GIC_INTR_CFG_LEVEL), \
+		(grp), GIC_INTR_CFG_LEVEL), \
 	INTR_PROP_DESC(JUNO_IRQ_USB_SMMU, GIC_HIGHEST_SEC_PRIORITY, \
-		grp, GIC_INTR_CFG_LEVEL), \
+		(grp), GIC_INTR_CFG_LEVEL), \
 	INTR_PROP_DESC(JUNO_IRQ_THIN_LINKS_SMMU, GIC_HIGHEST_SEC_PRIORITY, \
-		grp, GIC_INTR_CFG_LEVEL), \
+		(grp), GIC_INTR_CFG_LEVEL), \
 	INTR_PROP_DESC(JUNO_IRQ_SEC_I2C, GIC_HIGHEST_SEC_PRIORITY, \
-		grp, GIC_INTR_CFG_LEVEL), \
+		(grp), GIC_INTR_CFG_LEVEL), \
 	INTR_PROP_DESC(JUNO_IRQ_GPU_SMMU_1, GIC_HIGHEST_SEC_PRIORITY, \
-		grp, GIC_INTR_CFG_LEVEL), \
+		(grp), GIC_INTR_CFG_LEVEL), \
 	INTR_PROP_DESC(JUNO_IRQ_ETR_SMMU, GIC_HIGHEST_SEC_PRIORITY, \
-		grp, GIC_INTR_CFG_LEVEL)
+		(grp), GIC_INTR_CFG_LEVEL)
 
 #define PLAT_ARM_G0_IRQ_PROPS(grp)	ARM_G0_IRQ_PROPS(grp)
 
diff --git a/plat/arm/board/common/board_css_common.c b/plat/arm/board/juno/juno_common.c
similarity index 100%
rename from plat/arm/board/common/board_css_common.c
rename to plat/arm/board/juno/juno_common.c
diff --git a/plat/arm/board/juno/juno_topology.c b/plat/arm/board/juno/juno_topology.c
index 5f031c8..72bb92e 100644
--- a/plat/arm/board/juno/juno_topology.c
+++ b/plat/arm/board/juno/juno_topology.c
@@ -50,8 +50,8 @@
  ******************************************************************************/
 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
 {
-	return (((mpidr) & 0x100) ? JUNO_CLUSTER1_CORE_COUNT :\
-				JUNO_CLUSTER0_CORE_COUNT);
+	return (((mpidr & (u_register_t) 0x100) != 0U) ?
+			JUNO_CLUSTER1_CORE_COUNT : JUNO_CLUSTER0_CORE_COUNT);
 }
 
 /*
diff --git a/plat/arm/board/juno/platform.mk b/plat/arm/board/juno/platform.mk
index e2ec3c1..f28139d 100644
--- a/plat/arm/board/juno/platform.mk
+++ b/plat/arm/board/juno/platform.mk
@@ -29,7 +29,8 @@
 PLAT_INCLUDES		:=	-Iplat/arm/board/juno/include		\
 				-Iplat/arm/css/drivers/sds
 
-PLAT_BL_COMMON_SOURCES	:=	plat/arm/board/juno/${ARCH}/juno_helpers.S
+PLAT_BL_COMMON_SOURCES	:=	plat/arm/board/juno/${ARCH}/juno_helpers.S \
+				plat/arm/board/juno/juno_common.c
 
 # Flag to enable support for AArch32 state on JUNO
 JUNO_AARCH32_EL3_RUNTIME	:=	0
@@ -123,7 +124,7 @@
 # Do not enable SVE
 ENABLE_SVE_FOR_NS		:=	0
 
-include plat/arm/board/common/board_css.mk
+include plat/arm/board/common/board_common.mk
 include plat/arm/common/arm_common.mk
 include plat/arm/soc/common/soc_css.mk
 include plat/arm/css/common/css_common.mk
diff --git a/plat/arm/common/arm_nor_psci_mem_protect.c b/plat/arm/common/arm_nor_psci_mem_protect.c
index 07766a0..2a46b95 100644
--- a/plat/arm/common/arm_nor_psci_mem_protect.c
+++ b/plat/arm/common/arm_nor_psci_mem_protect.c
@@ -50,14 +50,14 @@
  ******************************************************************************/
 int arm_nor_psci_write_mem_protect(int val)
 {
-	int enable = (val != 0) ? 1 : 0;
+	unsigned long enable = (val != 0) ? 1UL : 0UL;
 
 	if (nor_unlock(PLAT_ARM_MEM_PROT_ADDR) != 0) {
 		ERROR("unlocking memory protect variable\n");
 		return -1;
 	}
 
-	if (enable == 1) {
+	if (enable == 1UL) {
 		/*
 		 * If we want to write a value different than 0
 		 * then we have to erase the full block because
diff --git a/plat/arm/common/arm_topology.c b/plat/arm/common/arm_topology.c
index c6d12da..b0ad4d1 100644
--- a/plat/arm/common/arm_topology.c
+++ b/plat/arm/common/arm_topology.c
@@ -29,12 +29,14 @@
 	pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
 #else
 	valid_mask = ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK);
-	cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
-	cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
+	cluster_id = (unsigned int) ((mpidr >> MPIDR_AFF1_SHIFT) &
+						MPIDR_AFFLVL_MASK);
+	cpu_id = (unsigned int) ((mpidr >> MPIDR_AFF0_SHIFT) &
+						MPIDR_AFFLVL_MASK);
 #endif /* ARM_PLAT_MT */
 
 	mpidr &= MPIDR_AFFINITY_MASK;
-	if (mpidr & valid_mask)
+	if ((mpidr & valid_mask) != 0U)
 		return -1;
 
 	if (cluster_id >= PLAT_ARM_CLUSTER_COUNT)
diff --git a/plat/arm/css/sgi/include/platform_def.h b/plat/arm/css/sgi/include/platform_def.h
index b87bded..6297490 100644
--- a/plat/arm/css/sgi/include/platform_def.h
+++ b/plat/arm/css/sgi/include/platform_def.h
@@ -9,12 +9,12 @@
 
 #include <arm_def.h>
 #include <arm_spm_def.h>
-#include <board_arm_def.h>
 #include <board_css_def.h>
 #include <common_def.h>
 #include <css_def.h>
 #include <soc_css_def.h>
 #include <utils_def.h>
+#include <v2m_def.h>
 #include <xlat_tables_defs.h>
 
 #define CSS_SGI_MAX_CPUS_PER_CLUSTER	4
@@ -26,6 +26,8 @@
 					CSS_SGI_MAX_CPUS_PER_CLUSTER * \
 					CSS_SGI_MAX_PE_PER_CPU)
 
+#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
+
 /*
  * PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the
  * plat_arm_mmap array defined for each BL stage.
@@ -86,6 +88,34 @@
  */
 #define PLAT_ARM_MAX_BL31_SIZE		0x3B000
 
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if ENABLE_SPM
+#  define PLATFORM_STACK_SIZE 0x500
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
+
 #define PLAT_ARM_NSTIMER_FRAME_ID	0
 
 #define PLAT_CSS_MHU_BASE		0x45000000
diff --git a/plat/arm/css/sgm/include/sgm_base_platform_def.h b/plat/arm/css/sgm/include/sgm_base_platform_def.h
index 7d35bd5..eaba619 100644
--- a/plat/arm/css/sgm/include/sgm_base_platform_def.h
+++ b/plat/arm/css/sgm/include/sgm_base_platform_def.h
@@ -8,13 +8,13 @@
 #define __SGM_BASE_PLATFORM_DEF_H__
 
 #include <arm_def.h>
-#include <board_arm_def.h>
 #include <board_css_def.h>
 #include <common_def.h>
 #include <css_def.h>
 #include <soc_css_def.h>
 #include <tzc400.h>
 #include <tzc_common.h>
+#include <v2m_def.h>
 
 /* CPU topology */
 #define PLAT_ARM_CLUSTER_COUNT		1
@@ -82,6 +82,8 @@
  * platforms
  *************************************************************************/
 
+#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
+
 /* MHU related constants */
 #define PLAT_CSS_MHU_BASE		0x2b1f0000
 
@@ -204,6 +206,29 @@
  */
 #define PLAT_ARM_MAX_BL31_SIZE		0x3B000
 
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
 /*******************************************************************************
  * Memprotect definitions
  ******************************************************************************/