diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 2b9e2b2..e5e135c 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -536,6 +536,10 @@
    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
    r0p2.
 
+-  ``ERRATA_V2_2743011``: This applies errata 2743011 workaround to Neoverse-V2
+   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
+   r0p2.
+
 -  ``ERRATA_V2_2779510``: This applies errata 2779510 workaround to Neoverse-V2
    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
    r0p2.
diff --git a/include/lib/cpus/aarch64/neoverse_v2.h b/include/lib/cpus/aarch64/neoverse_v2.h
index 5b06c06..68c1558 100644
--- a/include/lib/cpus/aarch64/neoverse_v2.h
+++ b/include/lib/cpus/aarch64/neoverse_v2.h
@@ -43,4 +43,11 @@
 #define NEOVERSE_V2_CPUACTLR3_EL1			S3_0_C15_C1_2
 #define NEOVERSE_V2_CPUACTLR3_EL1_BIT_47		(ULL(1) << 47)
 
+/*******************************************************************************
+ * CPU Auxiliary Control register 5 specific definitions.
+ ******************************************************************************/
+#define NEOVERSE_V2_CPUACTLR5_EL1			S3_0_C15_C8_0
+#define NEOVERSE_V2_CPUACTLR5_EL1_BIT_56		(ULL(1) << 56)
+#define NEOVERSE_V2_CPUACTLR5_EL1_BIT_55		(ULL(1) << 55)
+
 #endif /* NEOVERSE_V2_H */
diff --git a/lib/cpus/aarch64/neoverse_v2.S b/lib/cpus/aarch64/neoverse_v2.S
index cde4032..bfd088d 100644
--- a/lib/cpus/aarch64/neoverse_v2.S
+++ b/lib/cpus/aarch64/neoverse_v2.S
@@ -35,6 +35,13 @@
 
 check_erratum_ls neoverse_v2, ERRATUM(2719105), CPU_REV(0, 1)
 
+workaround_reset_start neoverse_v2, ERRATUM(2743011), ERRATA_V2_2743011
+	sysreg_bit_set NEOVERSE_V2_CPUACTLR5_EL1, NEOVERSE_V2_CPUACTLR5_EL1_BIT_55
+	sysreg_bit_clear NEOVERSE_V2_CPUACTLR5_EL1, NEOVERSE_V2_CPUACTLR5_EL1_BIT_56
+workaround_reset_end neoverse_v2, ERRATUM(2743011)
+
+check_erratum_ls neoverse_v2, ERRATUM(2743011), CPU_REV(0, 1)
+
 workaround_reset_start neoverse_v2, ERRATUM(2779510), ERRATA_V2_2779510
 	sysreg_bit_set NEOVERSE_V2_CPUACTLR3_EL1, NEOVERSE_V2_CPUACTLR3_EL1_BIT_47
 workaround_reset_end neoverse_v2, ERRATUM(2779510)
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 42d9058..b5b6ddf 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -798,6 +798,10 @@
 # to revisions r0p0 and r0p1. It is fixed in r0p2.
 CPU_FLAG_LIST += ERRATA_V2_2719105
 
+# Flag to apply erratum 2743011 workaround during reset. This erratum applies
+# to revisions r0p0 and r0p1. It is fixed in r0p2.
+CPU_FLAG_LIST += ERRATA_V2_2743011
+
 # Flag to apply erratum 2779510 workaround during reset. This erratum applies
 # to revisions r0p0 and r0p1. It is fixed in r0p2.
 CPU_FLAG_LIST += ERRATA_V2_2779510
diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c
index 25dc8f9..4066dfb 100644
--- a/services/std_svc/errata_abi/errata_abi_main.c
+++ b/services/std_svc/errata_abi/errata_abi_main.c
@@ -403,9 +403,10 @@
 		[1] = {2719103, 0x00, 0x01, ERRATA_V2_2719103, \
 			ERRATA_NON_ARM_INTERCONNECT},
 		[2] = {2719105, 0x00, 0x01, ERRATA_V2_2719105},
-		[3] = {2779510, 0x00, 0x01, ERRATA_V2_2779510},
-		[4] = {2801372, 0x00, 0x01, ERRATA_V2_2801372},
-		[5 ... ERRATA_LIST_END] = UNDEF_ERRATA,
+		[3] = {2743011, 0x00, 0x01, ERRATA_V2_2743011},
+		[4] = {2779510, 0x00, 0x01, ERRATA_V2_2779510},
+		[5] = {2801372, 0x00, 0x01, ERRATA_V2_2801372},
+		[6 ... ERRATA_LIST_END] = UNDEF_ERRATA,
 	}
 },
 #endif /* NEOVERSE_V2_H_INC */