commit a205a5c101c58773f7be4d4c2073cf0295cd0f49
author Yann Gautier <yann.gautier@foss.st.com> Mon Aug 30 15:06:54 2021 +0200
committer Yann Gautier <yann.gautier@st.com> Wed Dec 22 13:08:09 2021 +0100
tree e4f0175eb1321050e8676a88a248ea0be9e24217
parent 8aac3078d0fa64111457f6d3ffde010fb0686d33

feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

plat/st/stm32mp1/stm32mp1_private.c

diff --git a/plat/st/stm32mp1/stm32mp1_private.c b/plat/st/stm32mp1/stm32mp1_private.c
index 50112d0..e58528e 100644
--- a/plat/st/stm32mp1/stm32mp1_private.c
+++ b/plat/st/stm32mp1/stm32mp1_private.c
@@ -6,6 +6,7 @@
 
 #include <assert.h>
 
+#include <drivers/clk.h>
 #include <drivers/st/stm32_gpio.h>
 #include <drivers/st/stm32_iwdg.h>
 #include <lib/mmio.h>
@@ -566,14 +567,14 @@
 {
 	uint32_t bkpr_itf_idx = tamp_bkpr(TAMP_BOOT_MODE_BACKUP_REG_ID);
 
-	stm32mp_clk_enable(RTCAPB);
+	clk_enable(RTCAPB);
 
 	mmio_clrsetbits_32(bkpr_itf_idx,
 			   TAMP_BOOT_MODE_ITF_MASK,
 			   ((interface << 4) | (instance & 0xFU)) <<
 			   TAMP_BOOT_MODE_ITF_SHIFT);
 
-	stm32mp_clk_disable(RTCAPB);
+	clk_disable(RTCAPB);
 }
 
 void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance)
@@ -583,12 +584,12 @@
 	if (itf == 0U) {
 		uint32_t bkpr = tamp_bkpr(TAMP_BOOT_MODE_BACKUP_REG_ID);
 
-		stm32mp_clk_enable(RTCAPB);
+		clk_enable(RTCAPB);
 
 		itf = (mmio_read_32(bkpr) & TAMP_BOOT_MODE_ITF_MASK) >>
 			TAMP_BOOT_MODE_ITF_SHIFT;
 
-		stm32mp_clk_disable(RTCAPB);
+		clk_disable(RTCAPB);
 	}
 
 	*interface = itf >> 4;