| commit | 4ad43130c2c6d2d5596a69d8b44bb03f29711d05 | [log] [tgz] |
|---|---|---|
| author | Guo Yi <yguo@cavium.com> | Thu Dec 17 22:30:54 2020 +0000 |
| committer | Konstantin Porotchkin <kostap@marvell.com> | Tue Jun 01 17:44:21 2021 +0200 |
| tree | bcd3140b0b19911e9495307abdf26873c085656d | |
| parent | 2673881a76315915dae91d6f2d5012095b209a30 [diff] |
fix(plat/marvell/armada): select correct pcie reference clock source when comphy is in pcie mode, correct reference clock need be selected according to SAR register that reflect the CPx_MPP boot strapping pins. Either from external or from internal Signed-off-by: Guo Yi <yguo@cavium.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Change-Id: I99ed64a141e85174cc0f8e9dab5886ab2506efa1