tree 3b4f2deb6392a5c842f92a348936571c977d0366
parent 20e84c828021d3220b38e9a8d6ed0d160d53415a
author Stephan Gerhold <stephan@gerhold.net> 1680810217 +0200
committer Manish V Badarkhe <manish.badarkhe@arm.com> 1683661587 +0200

fix(msm8916): add timeout for crash console TX flush

Resetting the UART DM controller while there are still remaining
characters in the FIFO often results in corruption on the UART receiver
side. To avoid this the msm8916 crash console implementation tries to
wait until the TX FIFO is empty.

Unfortunately this might spin forever if the transmitter was disabled
before it has fully finished transmitting. In this case the TXEMT bit
console_uartdm_core_flush is waiting for will never get set.

There seems to be no good way to detect if the transmitter is actually
enabled via the status registers. However, the TX FIFO is fairly small
and should not take too long to get flushed, so fix this by simply
limiting the amount of iterations with a short timeout.

Move the code to console_uartdm_core_init to ensure that this always
happens before resetting the transmitter (also during initialization).

Change-Id: I5bb43cb0b6c029bcd15e253d60d36c0b310e108b
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>