| commit | a037d976d6b385377775431aea2a9eebf93c135e | [log] [tgz] |
|---|---|---|
| author | Channagoud kadabi <kadabi@google.com> | Tue Nov 29 16:03:47 2022 -0800 |
| committer | kadabi <kadabi@google.com> | Mon Dec 12 20:33:40 2022 +0200 |
| tree | 4b90c226f9718a6e007d7a7ba22fac9b66de4f75 | |
| parent | 0f391cb64a2ea851f7cac2d7c5aac506d4aec0e5 [diff] |
fix(gic): wrap cache enabled assert under plat_can_cmo with reference to feature 04c730 (feat(cpus): make cache ops conditional), booting with caches in debug recovery means SCTLR_C_BIT will be 0. Wrap the assert for the d-cache enabled check in CONDITIONAL_CMO and plat_can_cmo calls to allow booting with d-cache disabled. Signed-off-by: Channagoud kadabi <kadabi@google.com> Change-Id: I80153df493d1ec9e5e354c7c2e6a14322d22c446