diff --git a/plat/nvidia/tegra/soc/t132/platform_t132.mk b/plat/nvidia/tegra/soc/t132/platform_t132.mk
index 8b3d238..f15ee74 100644
--- a/plat/nvidia/tegra/soc/t132/platform_t132.mk
+++ b/plat/nvidia/tegra/soc/t132/platform_t132.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c
index 233644b..da5530f 100644
--- a/plat/nvidia/tegra/soc/t186/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t186/plat_setup.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -14,7 +14,10 @@
 #include <cortex_a57.h>
 #include <debug.h>
 #include <denver.h>
+#include <gic_common.h>
+#include <gicv2.h>
 #include <interrupt_mgmt.h>
+#include <interrupt_props.h>
 #include <mce.h>
 #include <platform.h>
 #include <tegra_def.h>
@@ -185,17 +188,11 @@
 }
 
 /* Secure IRQs for Tegra186 */
-static const irq_sec_cfg_t tegra186_sec_irqs[] = {
-	{
-		TEGRA186_TOP_WDT_IRQ,
-		TEGRA186_SEC_IRQ_TARGET_MASK,
-		INTR_TYPE_EL3,
-	},
-	{
-		TEGRA186_AON_WDT_IRQ,
-		TEGRA186_SEC_IRQ_TARGET_MASK,
-		INTR_TYPE_EL3,
-	},
+static const interrupt_prop_t tegra186_interrupt_props[] = {
+	INTR_PROP_DESC(TEGRA186_TOP_WDT_IRQ, GIC_HIGHEST_SEC_PRIORITY,
+			GICV2_INTR_GROUP0, GIC_INTR_CFG_EDGE),
+	INTR_PROP_DESC(TEGRA186_AON_WDT_IRQ, GIC_HIGHEST_SEC_PRIORITY,
+			GICV2_INTR_GROUP0, GIC_INTR_CFG_EDGE)
 };
 
 /*******************************************************************************
@@ -203,14 +200,13 @@
  ******************************************************************************/
 void plat_gic_setup(void)
 {
-	tegra_gic_setup(tegra186_sec_irqs,
-		sizeof(tegra186_sec_irqs) / sizeof(tegra186_sec_irqs[0]));
+	tegra_gic_setup(tegra186_interrupt_props, ARRAY_SIZE(tegra186_interrupt_props));
 
 	/*
 	 * Initialize the FIQ handler only if the platform supports any
 	 * FIQ interrupt sources.
 	 */
-	if (sizeof(tegra186_sec_irqs) > 0)
+	if (sizeof(tegra186_interrupt_props) > 0)
 		tegra_fiq_handler_setup();
 }
 
diff --git a/plat/nvidia/tegra/soc/t210/platform_t210.mk b/plat/nvidia/tegra/soc/t210/platform_t210.mk
index 97ca3f1..b0a474c 100644
--- a/plat/nvidia/tegra/soc/t210/platform_t210.mk
+++ b/plat/nvidia/tegra/soc/t210/platform_t210.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -22,12 +22,12 @@
 MAX_MMAP_REGIONS			:= 8
 $(eval $(call add_define,MAX_MMAP_REGIONS))
 
-BL31_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
-				lib/cpus/aarch64/cortex_a57.S		\
+BL31_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S			\
+				lib/cpus/aarch64/cortex_a57.S			\
 				${COMMON_DIR}/drivers/flowctrl/flowctrl.c	\
 				${COMMON_DIR}/drivers/memctrl/memctrl_v1.c	\
-				${SOC_DIR}/plat_psci_handlers.c		\
-				${SOC_DIR}/plat_setup.c			\
+				${SOC_DIR}/plat_psci_handlers.c			\
+				${SOC_DIR}/plat_setup.c				\
 				${SOC_DIR}/plat_secondary.c
 
 # Enable workarounds for selected Cortex-A57 erratas.