| commit | 9efc750d060712bbfca648b108cdffdb6ef69f3d | [log] [tgz] |
|---|---|---|
| author | Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> | Wed Jun 12 14:30:30 2024 +0300 |
| committer | Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> | Fri Jul 19 08:40:14 2024 +0300 |
| tree | b9214611f43c709b2c3dd14cf8257d8c86163db7 | |
| parent | b390c4dd62b528ec9776b20c8744932dda62b89e [diff] |
feat(nxp-clk): add ARM PLL ODIV enablement Enable the PLL dividers using their memory-mapped interface. Otherwise, the clock will not be propagated to downstream clock modules. Change-Id: I39115cb2cb754cee87d7b6b4aa7502c3f1ef37ce Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>