Introduce some helper macros for exception vectors
This patch introduces some assembler macros to simplify the
declaration of the exception vectors. It abstracts the section
the exception code is put into as well as the alignments
constraints mandated by the ARMv8 architecture. For all TF images,
the exception code has been updated to make use of these macros.
This patch also updates some invalid comments in the exception
vector code.
Change-Id: I35737b8f1c8c24b6da89b0a954c8152a4096fa95
diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index dc11e0a..799062e 100644
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -161,14 +161,14 @@
str x18, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_SP_EL0]
.endm
- .section .vectors, "ax"; .align 11
- .align 7
-runtime_exceptions:
+
+vector_base runtime_exceptions
+
/* -----------------------------------------------------
* Current EL with _sp_el0 : 0x0 - 0x200
* -----------------------------------------------------
*/
-sync_exception_sp_el0:
+vector_entry sync_exception_sp_el0
/* -----------------------------------------------------
* We don't expect any synchronous exceptions from EL3
* -----------------------------------------------------
@@ -176,23 +176,22 @@
bl report_unhandled_exception
check_vector_size sync_exception_sp_el0
- .align 7
/* -----------------------------------------------------
* EL3 code is non-reentrant. Any asynchronous exception
* is a serious error. Loop infinitely.
* -----------------------------------------------------
*/
-irq_sp_el0:
+vector_entry irq_sp_el0
bl report_unhandled_interrupt
check_vector_size irq_sp_el0
- .align 7
-fiq_sp_el0:
+
+vector_entry fiq_sp_el0
bl report_unhandled_interrupt
check_vector_size fiq_sp_el0
- .align 7
-serror_sp_el0:
+
+vector_entry serror_sp_el0
bl report_unhandled_exception
check_vector_size serror_sp_el0
@@ -200,8 +199,8 @@
* Current EL with SPx: 0x200 - 0x400
* -----------------------------------------------------
*/
- .align 7
-sync_exception_sp_elx:
+
+vector_entry sync_exception_sp_elx
/* -----------------------------------------------------
* This exception will trigger if anything went wrong
* during a previous exception entry or exit or while
@@ -212,18 +211,15 @@
bl report_unhandled_exception
check_vector_size sync_exception_sp_elx
- .align 7
-irq_sp_elx:
+vector_entry irq_sp_elx
bl report_unhandled_interrupt
check_vector_size irq_sp_elx
- .align 7
-fiq_sp_elx:
+vector_entry fiq_sp_elx
bl report_unhandled_interrupt
check_vector_size fiq_sp_elx
- .align 7
-serror_sp_elx:
+vector_entry serror_sp_elx
bl report_unhandled_exception
check_vector_size serror_sp_elx
@@ -231,8 +227,7 @@
* Lower EL using AArch64 : 0x400 - 0x600
* -----------------------------------------------------
*/
- .align 7
-sync_exception_aarch64:
+vector_entry sync_exception_aarch64
/* -----------------------------------------------------
* This exception vector will be the entry point for
* SMCs and traps that are unhandled at lower ELs most
@@ -244,23 +239,20 @@
handle_sync_exception
check_vector_size sync_exception_aarch64
- .align 7
/* -----------------------------------------------------
* Asynchronous exceptions from lower ELs are not
* currently supported. Report their occurrence.
* -----------------------------------------------------
*/
-irq_aarch64:
+vector_entry irq_aarch64
handle_interrupt_exception irq_aarch64
check_vector_size irq_aarch64
- .align 7
-fiq_aarch64:
+vector_entry fiq_aarch64
handle_interrupt_exception fiq_aarch64
check_vector_size fiq_aarch64
- .align 7
-serror_aarch64:
+vector_entry serror_aarch64
bl report_unhandled_exception
check_vector_size serror_aarch64
@@ -268,8 +260,7 @@
* Lower EL using AArch32 : 0x600 - 0x800
* -----------------------------------------------------
*/
- .align 7
-sync_exception_aarch32:
+vector_entry sync_exception_aarch32
/* -----------------------------------------------------
* This exception vector will be the entry point for
* SMCs and traps that are unhandled at lower ELs most
@@ -281,27 +272,23 @@
handle_sync_exception
check_vector_size sync_exception_aarch32
- .align 7
/* -----------------------------------------------------
* Asynchronous exceptions from lower ELs are not
* currently supported. Report their occurrence.
* -----------------------------------------------------
*/
-irq_aarch32:
+vector_entry irq_aarch32
handle_interrupt_exception irq_aarch32
check_vector_size irq_aarch32
- .align 7
-fiq_aarch32:
+vector_entry fiq_aarch32
handle_interrupt_exception fiq_aarch32
check_vector_size fiq_aarch32
- .align 7
-serror_aarch32:
+vector_entry serror_aarch32
bl report_unhandled_exception
check_vector_size serror_aarch32
- .align 7
/* -----------------------------------------------------
* The following code handles secure monitor calls.