commit 9e33b028385d9a5c6a9a9172e9af2e8927041495
author Masahiro Yamada <yamada.masahiro@socionext.com> Mon Feb 03 19:33:35 2020 +0900
committer Masahiro Yamada <yamada.masahiro@socionext.com> Wed Feb 12 13:36:58 2020 +0900
tree b8667e9caccf7d3567446f0bc77ff2097ed45056
parent 6ebf63812168d12464e0fb295691505b3cbb1a42

uniphier: make pinmon base address configurable

The register base will be changed in the next SoC. Make it
configurable.

Change-Id: I9fbb6bdd1cf06207618742d4ad7970d911c9bc26
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

plat/socionext/uniphier/uniphier_boot_device.c

diff --git a/plat/socionext/uniphier/uniphier_boot_device.c b/plat/socionext/uniphier/uniphier_boot_device.c
index 517ec96..36a9908 100644
--- a/plat/socionext/uniphier/uniphier_boot_device.c
+++ b/plat/socionext/uniphier/uniphier_boot_device.c
@@ -13,8 +13,14 @@
 
 #include "uniphier.h"
 
-#define UNIPHIER_PINMON0		0x5f900100
-#define UNIPHIER_PINMON2		0x5f900108
+#define UNIPHIER_PINMON0		0x0
+#define UNIPHIER_PINMON2		0x8
+
+static const uintptr_t uniphier_pinmon_base[] = {
+	[UNIPHIER_SOC_LD11] = 0x5f900100,
+	[UNIPHIER_SOC_LD20] = 0x5f900100,
+	[UNIPHIER_SOC_PXS3] = 0x5f900100,
+};
 
 static bool uniphier_ld11_is_usb_boot(uint32_t pinmon)
 {
@@ -28,7 +34,8 @@
 
 static bool uniphier_pxs3_is_usb_boot(uint32_t pinmon)
 {
-	uint32_t pinmon2 = mmio_read_32(UNIPHIER_PINMON2);
+	uintptr_t pinmon_base = uniphier_pinmon_base[UNIPHIER_SOC_PXS3];
+	uint32_t pinmon2 = mmio_read_32(pinmon_base + UNIPHIER_PINMON2);
 
 	return !!(pinmon2 & BIT(31));
 }
@@ -133,12 +140,16 @@
 unsigned int uniphier_get_boot_device(unsigned int soc)
 {
 	const struct uniphier_boot_device_info *info;
+	uintptr_t pinmon_base;
 	uint32_t pinmon;
 
 	assert(soc < ARRAY_SIZE(uniphier_boot_device_info));
 	info = &uniphier_boot_device_info[soc];
 
+	assert(soc < ARRAY_SIZE(uniphier_boot_device_info));
+	pinmon_base = uniphier_pinmon_base[soc];
+
-	pinmon = mmio_read_32(UNIPHIER_PINMON0);
+	pinmon = mmio_read_32(pinmon_base + UNIPHIER_PINMON0);
 
 	if (info->have_boot_swap && !(pinmon & BIT(29)))
 		return UNIPHIER_BOOT_DEVICE_NOR;
@@ -163,7 +174,12 @@
 	assert(soc < ARRAY_SIZE(uniphier_have_onchip_scp));
 
 	if (uniphier_have_onchip_scp[soc]) {
-		if (mmio_read_32(UNIPHIER_PINMON0) & BIT(27))
+		uintptr_t pinmon_base;
+
+		assert(soc < ARRAY_SIZE(uniphier_boot_device_info));
+		pinmon_base = uniphier_pinmon_base[soc];
+
+		if (mmio_read_32(pinmon_base + UNIPHIER_PINMON0) & BIT(27))
 			return UNIPHIER_BOOT_MASTER_THIS;
 		else
 			return UNIPHIER_BOOT_MASTER_SCP;