diff --git a/plat/amlogic/common/aml_mhu.c b/plat/amlogic/common/aml_mhu.c
index 4c1d5b6..001686a 100644
--- a/plat/amlogic/common/aml_mhu.c
+++ b/plat/amlogic/common/aml_mhu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -10,43 +10,43 @@
 
 static DEFINE_BAKERY_LOCK(mhu_lock);
 
-void mhu_secure_message_start(void)
+void aml_mhu_secure_message_start(void)
 {
 	bakery_lock_get(&mhu_lock);
 
-	while (mmio_read_32(GXBB_HIU_MAILBOX_STAT_3) != 0)
+	while (mmio_read_32(AML_HIU_MAILBOX_STAT_3) != 0)
 		;
 }
 
-void mhu_secure_message_send(uint32_t msg)
+void aml_mhu_secure_message_send(uint32_t msg)
 {
-	mmio_write_32(GXBB_HIU_MAILBOX_SET_3, msg);
+	mmio_write_32(AML_HIU_MAILBOX_SET_3, msg);
 
-	while (mmio_read_32(GXBB_HIU_MAILBOX_STAT_3) != 0)
+	while (mmio_read_32(AML_HIU_MAILBOX_STAT_3) != 0)
 		;
 }
 
-uint32_t mhu_secure_message_wait(void)
+uint32_t aml_mhu_secure_message_wait(void)
 {
 	uint32_t val;
 
 	do {
-		val = mmio_read_32(GXBB_HIU_MAILBOX_STAT_0);
+		val = mmio_read_32(AML_HIU_MAILBOX_STAT_0);
 	} while (val == 0);
 
 	return val;
 }
 
-void mhu_secure_message_end(void)
+void aml_mhu_secure_message_end(void)
 {
-	mmio_write_32(GXBB_HIU_MAILBOX_CLR_0, 0xFFFFFFFF);
+	mmio_write_32(AML_HIU_MAILBOX_CLR_0, 0xFFFFFFFF);
 
 	bakery_lock_release(&mhu_lock);
 }
 
-void mhu_secure_init(void)
+void aml_mhu_secure_init(void)
 {
 	bakery_lock_init(&mhu_lock);
 
-	mmio_write_32(GXBB_HIU_MAILBOX_CLR_3, 0xFFFFFFFF);
+	mmio_write_32(AML_HIU_MAILBOX_CLR_3, 0xFFFFFFFF);
 }