fix(tc): replace vencoder with simple panel for kernel > 6.6
The component-aware simple encoder has become outdated with the latest
upstream DRM subsystem changes since Linux kernel commit 4cfe5cc02e3f
("drm/arm/komeda: Remove component framework and add a simple encoder")
To address this we introduce a new compilation flag
`TC_DPU_USE_SIMPLE_PANEL` for control panel vs. encoder enablement.
This flag is set when the kernel version is >= 6.6 and 0 when the kernel
version is < 6.6.
We also rename the `vencoder_in` node to `lcd_in` to avoid unnecessary
conditional code for vencoder vs. simple panel enablement.
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
Change-Id: Ibb14a56911cfb406b2181a22cc40db58d8ceaa8d
diff --git a/fdts/tc-base.dtsi b/fdts/tc-base.dtsi
index 735d429..e898399 100644
--- a/fdts/tc-base.dtsi
+++ b/fdts/tc-base.dtsi
@@ -405,34 +405,50 @@
dpu_aclk: dpu_aclk {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <VENCODER_TIMING_CLK>;
+ clock-frequency = <LCD_TIMING_CLK>;
clock-output-names = "fpga:dpu_aclk";
};
dpu_pixel_clk: dpu-pixel-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <VENCODER_TIMING_CLK>;
+ clock-frequency = <LCD_TIMING_CLK>;
clock-output-names = "pxclk";
};
#endif /* !TC_DPU_USE_SCMI_CLK */
+#if TC_DPU_USE_SIMPLE_PANEL
+ vpanel {
+ compatible = "panel-dpi";
+ post-init-providers = <&pl0>;
+ port {
+ lcd_in: endpoint {
+ remote-endpoint = <&dp_pl0_out0>;
+ };
+ };
+
+ panel-timing {
+ LCD_TIMING;
+ };
+ };
+
+#else
vencoder {
compatible = "drm,virtual-encoder";
port {
- vencoder_in: endpoint {
+ lcd_in: endpoint {
remote-endpoint = <&dp_pl0_out0>;
};
};
display-timings {
timing-panel {
- VENCODER_TIMING;
+ LCD_TIMING;
};
};
};
-
+#endif
ethernet: ethernet@ETHERNET_ADDR {
reg = <0x0 ADDRESSIFY(ETHERNET_ADDR) 0x0 0x10000>;
interrupts = <GIC_SPI ETHERNET_INT IRQ_TYPE_LEVEL_HIGH 0>;
@@ -575,7 +591,7 @@
port@0 {
reg = <0>;
dp_pl0_out0: endpoint {
- remote-endpoint = <&vencoder_in>;
+ remote-endpoint = <&lcd_in>;
};
};
};
diff --git a/fdts/tc-fpga.dtsi b/fdts/tc-fpga.dtsi
index c761808..af140bb 100644
--- a/fdts/tc-fpga.dtsi
+++ b/fdts/tc-fpga.dtsi
@@ -8,9 +8,9 @@
#define GIC_GICR_OFFSET 0x1000000
#define UART_OFFSET 0x10000
/* 1440x3200@120 framebuffer */
-#define VENCODER_TIMING_CLK 836000000
-#define VENCODER_TIMING \
- clock-frequency = <VENCODER_TIMING_CLK>; \
+#define LCD_TIMING_CLK 836000000
+#define LCD_TIMING \
+ clock-frequency = <LCD_TIMING_CLK>; \
hactive = <1440>; \
vactive = <3200>; \
hfront-porch = <136>; \
diff --git a/fdts/tc-fvp.dtsi b/fdts/tc-fvp.dtsi
index f57e21d..960730c 100644
--- a/fdts/tc-fvp.dtsi
+++ b/fdts/tc-fvp.dtsi
@@ -10,9 +10,9 @@
#ifdef TC_RESOLUTION_1920X1080P60
-#define VENCODER_TIMING_CLK 148500000
-#define VENCODER_TIMING \
- clock-frequency = <VENCODER_TIMING_CLK>; \
+#define LCD_TIMING_CLK 148500000
+#define LCD_TIMING \
+ clock-frequency = <LCD_TIMING_CLK>; \
hactive = <1920>; \
vactive = <1080>; \
hfront-porch = <88>; \
@@ -24,9 +24,9 @@
#else /* TC_RESOLUTION_640X480P60 */
-#define VENCODER_TIMING_CLK 25175000
-#define VENCODER_TIMING \
- clock-frequency = <VENCODER_TIMING_CLK>; \
+#define LCD_TIMING_CLK 25175000
+#define LCD_TIMING \
+ clock-frequency = <LCD_TIMING_CLK>; \
hactive = <640>; \
vactive = <480>; \
hfront-porch = <16>; \